JESD204B is a high-speed serial interface used between data converters, such as analog-to-digital converters (ADCs) and digital-to-analog converters (DACs), and the FPGA device to replace traditional interfaces, such as CMOS and LVDS. With converter sampling rates and data throughput increasing, the JESD204B interface offers advantages in terms of size, cost, and speed.
The Lattice JESD204B IP supports both the Tx and Rx directions, with corresponding PHY, link, and embedded transport layers, on Lattice FPGA devices
JESD204B for Lattice Radiant – CertusPro-NX, Avant-G, Avant-X, and Certus-N2
JESD204B for Lattice Diamond – ECP5-5G, ECP5 and LatticeECP3.
Features
- JESD204B subclass 0 and 1.
- Lane rates up to:
- 8.192 Gb/s for CertusPro-NX devices
- 9.8304 Gb/s for Avant-G, Avant-X, and Certus-N2 devices
- Configurable lane counts of:
- 1, 2, or 4 lanes for CertusPro-NX and Certus-N2 devices
- 1, 2, 4, or 8 lanes for Avant-G and Avant-X devices
- Scrambler and descrambler support
- SYSREF modes: One-shot and Periodic (always).
