Lattice Semiconductor and NXP have collaborated to deliver this reference design, complete with source code, to end customers. This solution is designed to facilitate the implementation of FlexSPI communication and to expedite deployment using the Lattice ECP5 Evaluation Board. The i.MX 93 processor enables high-performance, low-latency communication with FPGA/CPLD devices via FlexSPI interfaces.
Features
- Supports 1/2/4/8 bidirectional data lines
- Supports SDR/DDR at maximum of 200MHz
- Simple timing implementation at FPGA/CPLD
