The Soft Error Detection (SED) and Soft Error Correction (SEC) reference design is supported in the Lattice Avant™ device families that implements a state machine controller that interfaces with the SEDC Controller IP to enable the soft error detection/correction (SEDC) function, which can be used to detect and correct static random access memory (SRAM) errors.
Features
- Ability to perform SEDC in continuous mode
- Ability to detect and flag single-bit and multi-bit errors when they occur
- Ability to correct 1-bit soft errors
- Ability to insert 1-bit or 2-bit soft errors through the soft error injection (SEI) tool
- Ability to measure the SED and SEC time
