The Lattice Automate Stack solution system architecture and initial reference design is depicted below. The Lattice Propel built RISC-V processor based subsystem combined with HW acceleration enables flexible, low power and high performance support for multi-channel motor control with AI based predictive maintenance over EtherConnect - a low-cost, real-time embedded Ethernet Network. Lattice and design services partners are also available to provide customizations to enable support for different types of motors and topologies.
Block Diagram
Documentation
Quick Reference | Downloads |
| TITLE | NUMBER | VERSION | DATE | FORMAT | SIZE | ||
|---|---|---|---|---|---|---|---|
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| Automate Stack 2.0 Demo - User Guide | FPGA-UG-02164 | 2.0 | 6/28/2022 | 6.4 MB | |||
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| TITLE | NUMBER | VERSION | DATE | FORMAT | SIZE | ||
|---|---|---|---|---|---|---|---|
| Select All | |||||||
| Docklight Scripts | 1.1 | 12/15/2021 | PTP | 3.6 KB | |||
| Main System Demo Design File V2.0 | 2.0 | 6/28/2022 | ZIP | 2.2 MB | |||
| Node System Demo Design File V2.0 | 2.0 | 6/28/2022 | ZIP | 1 MB | |||
