                             Lattice Mapping Report File
    Design:  byteCounter
    Family:  LFCPNX
    Device:  LFCPNX-100
    Package: LFG672
    Performance Grade:  7_High-Performance_1.0V

    Mapper:    version Radiant Software (64-bit) 2023.1.0.43.3
    Mapped on: Thu Jul 20 12:17:27 2023

    Design Information

    Command line:   map -i byteCounter_impl_1_syn.udb -pdc
         C:/Users/VJivan/Documents/Workspace/TestCounter/byteCounter/pins.pdc -o
         byteCounter_impl_1_map.udb -mp byteCounter_impl_1.mrp -hierrpt -gui

    Design Summary
       Number of registers:        1035 out of 80769 (1%)
          Number of SLICE         registers: 1035 out of 79872 (1%)
          Number of PIO Input     registers:    0 out of   299 (0%)
          Number of PIO Output    registers:    0 out of   299 (0%)
          Number of PIO Tri-State registers:    0 out of   299 (0%)
       Number of LUT4s:            1901 out of 79872 (2%)
          Number used as logic LUT4s:                       1607
          Number used as distributed RAM:                     24 (6 per 16X4 RAM)
          Number used as ripple logic:                       270 (2 per CCU2)
       Number of PIOs used/reserved:   18 out of   299 (6%)
          Number of PIOs reserved:      3 (per sysConfig and/or prohibit constraint)
          Number of PIOs used:         15
            Number of PIOs used for single ended IO:        13
            Number of PIO pairs used for differential IO:    1
            Number allocated to regular speed PIOs:    13 out of  167 (8%)
            Number allocated to high speed PIOs:        2 out of  132 (2%)
       Number of Dedicated IO used for ADC/PCS/PCIE:    0 out of   60 (0%)
       Number of IDDR/ODDR/TDDR functions used:      0 out of   730 (0%)
       Number of IOs using at least one DDR function: 0 (0 differential)
       Number of Block RAMs:          3 out of 208 (1%)
       Number of Large RAMs:          0 out of 7 (0%)
       Number of Logical DSP Functions:
          Number of Pre-Adders (9+9):    0 out of 312 (0%)
          Number of Multipliers (18x18): 0 out of 156 (0%)
             Number of 9X9:        0 (1 18x18 = 2   9x9)
             Number of 18x18:      0 (1 18x18 = 1 18x18)
             Number of 18x36:      0 (2 18x18 = 1 18x36)
             Number of 36x36:      0 (4 18x18 = 1 36x36)
          Number of 54-bit Accumulators: 0 out of 78 (0%)
          Number of 18-bit Registers:    0 out of 312 (0%)
       Number of Physical DSP Components:
          Number of PREADD9:             0 out of 312 (0%)
          Number of MULT9:               0 out of 312 (0%)
          Number of MULT18:              0 out of 156 (0%)
          Number of MULT18X36:           0 out of 78 (0%)
          Number of MULT36:              0 out of 39 (0%)
          Number of ACC54:               0 out of 78 (0%)
          Number of REG18:               0 out of 312 (0%)
       Number of ALUREGs:             0 out of 1 (0%)
       Number of PLLs:                0 out of 4 (0%)
       Number of DDRDLLs:             0 out of 2 (0%)

       Number of DLLDELs:             0 out of 10 (0%)
       Number of DQSs:                0 out of 11 (0%)
       Number of DCSs:                0 out of 2 (0%)
       Number of DCCs:                0 out of 62 (0%)
       Number of PCLKDIVs:            0 out of 2 (0%)
       Number of ECLKDIVs:            0 out of 12 (0%)
       Number of ECLKSYNCs:           0 out of 12 (0%)
       Number of ADC Blocks:          0 out of 1 (0%)
       Number of SGMIICDRs:           0 out of 2 (0%)
       Number of PMUs:                0 out of 1 (0%)
       Number of BNKREF18s:           0 out of 3 (0%)
       Number of BNKREF33s:           0 out of 5 (0%)
       Number of I2CFIFOs:            0 out of 1 (0%)
       Number of Oscillators:         0 out of 1 (0%)
       Number of GSR:                 1 out of 1 (100%)
       Number of Cryptographic Block: 0 out of 1 (0%)
       Number of Config IP:           0 out of 1 (0%)
                     TSALL:           0 out of 1 (0%)
       Number of JTAG:                1 out of 1 (100%)
       Number of SED:                 0 out of 1 (0%)
       Number of PCSs:                0 out of 2 (0%)
       Number of PCIE Link Layers:    0 out of 1 (0%)
       Number of Clocks:  3
          Net jtck: 511 loads, 0 rising, 511 falling (Driver: Pin
         jtaghub_inst.jtagg_u/JTCK)
          Net jtaghub_inst.tck: 1 loads, 1 rising, 0 falling (Driver: Port TCK)
          Net clk_p_c: 478 loads, 478 rising, 0 falling (Driver: Port clk_p)
       Number of Clock Enables:  101
          Net trigger_en[1]_N: 3 loads, 0 SLICEs
          Net jtaghub_inst.er1_shift_reg8: 23 loads, 23 SLICEs
          Net ip_enable0: 15 loads, 15 SLICEs
          Net ip_enable1: 15 loads, 15 SLICEs
          Net jtaghub_inst.JUPDATE: 13 loads, 13 SLICEs
          Net reveal_coretop_i19101.n37_enable_151: 20 loads, 20 SLICEs
          Net reveal_coretop_i19101.sample_en_d: 7 loads, 7 SLICEs
          Net reveal_coretop_i19101.n37_enable_51: 2 loads, 2 SLICEs
          Net reveal_coretop_i19101.n37_enable_73: 20 loads, 20 SLICEs
          Net reveal_coretop_i19101.clk[1]_N_keep_enable_92: 2 loads, 2 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_75:
         3 loads, 3 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_19:
         1 loads, 1 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_24:
         1 loads, 1 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_73:
         3 loads, 3 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_27:
         1 loads, 1 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_20:
         1 loads, 1 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_55:
         3 loads, 3 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_29:
         1 loads, 1 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_25:
         1 loads, 1 SLICEs
          Net secured_signal_474: 1 loads, 1 SLICEs

          Net secured_signal_480: 2 loads, 2 SLICEs
          Net secured_signal_485: 2 loads, 2 SLICEs
          Net secured_signal_509: 1 loads, 1 SLICEs
          Net secured_signal_537: 9 loads, 9 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.trig_u.num_then_wen: 1
         loads, 1 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.next_then_reg_wen: 2
         loads, 2 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.cnt_contig_reg_wen: 2
         loads, 2 SLICEs
          Net secured_signal_589: 1 loads, 1 SLICEs
          Net secured_signal_603: 1 loads, 1 SLICEs
          Net secured_signal_641: 16 loads, 16 SLICEs
          Net secured_signal_704: 2 loads, 2 SLICEs
          Net secured_signal_709: 1 loads, 1 SLICEs
          Net
         reveal_coretop_i19101.bytecounter_la0_inst_0.cnt_contig_reg_wen_adj_1522: 2
         loads, 2 SLICEs
          Net
         reveal_coretop_i19101.bytecounter_la0_inst_0.next_then_reg_wen_adj_1523: 2
         loads, 2 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_21:
         2 loads, 2 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_53:
         16 loads, 16 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_31:
         2 loads, 2 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_36:
         3 loads, 3 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_32:
         2 loads, 2 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_23:
         1 loads, 1 SLICEs
          Net secured_signal_813: 42 loads, 42 SLICEs
          Net secured_signal_820: 11 loads, 9 SLICEs
          Net secured_signal_831: 9 loads, 9 SLICEs
          Net secured_signal_883: 9 loads, 9 SLICEs
          Net secured_signal_933: 1 loads, 1 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_26:
         1 loads, 1 SLICEs
          Net secured_signal_947: 1 loads, 1 SLICEs
          Net secured_signal_1044: 2 loads, 2 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_63:
         9 loads, 9 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_83:
         9 loads, 9 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_89:
         2 loads, 2 SLICEs
          Net secured_signal_1314: 2 loads, 2 SLICEs
          Net secured_signal_1323: 2 loads, 2 SLICEs
          Net secured_signal_1423: 1 loads, 1 SLICEs
          Net secured_signal_1535: 1 loads, 1 SLICEs
          Net secured_signal_1588: 2 loads, 2 SLICEs
          Net reveal_coretop_i19101.sample_en_d_adj_1540: 7 loads, 7 SLICEs
          Net secured_signal_1896: 1 loads, 1 SLICEs
          Net secured_signal_1900: 1 loads, 1 SLICEs
          Net reveal_coretop_i19101.bytecounter_la1_inst_1.clk[1]_N_keep_enable_48:

         3 loads, 3 SLICEs
          Net secured_signal_1926: 1 loads, 1 SLICEs
          Net secured_signal_1930: 1 loads, 1 SLICEs
          Net reveal_coretop_i19101.bytecounter_la1_inst_1.clk[1]_N_keep_enable_50:
         3 loads, 3 SLICEs
          Net secured_signal_1955: 1 loads, 1 SLICEs
          Net secured_signal_1957: 1 loads, 1 SLICEs
          Net reveal_coretop_i19101.bytecounter_la1_inst_1.clk[1]_N_keep_enable_68:
         3 loads, 3 SLICEs
          Net secured_signal_1974: 1 loads, 1 SLICEs
          Net secured_signal_1980: 2 loads, 2 SLICEs
          Net secured_signal_1989: 2 loads, 2 SLICEs
          Net secured_signal_2011: 1 loads, 1 SLICEs
          Net secured_signal_2047: 9 loads, 9 SLICEs
          Net reveal_coretop_i19101.bytecounter_la1_inst_1.next_then_reg_wen: 2
         loads, 2 SLICEs
          Net reveal_coretop_i19101.bytecounter_la1_inst_1.cnt_contig_reg_wen: 2
         loads, 2 SLICEs
          Net reveal_coretop_i19101.bytecounter_la1_inst_1.num_then_wen: 1 loads, 1
         SLICEs
          Net secured_signal_2109: 2 loads, 2 SLICEs
          Net secured_signal_2139: 1 loads, 1 SLICEs
          Net secured_signal_2149: 1 loads, 1 SLICEs
          Net secured_signal_2171: 16 loads, 16 SLICEs
          Net
         reveal_coretop_i19101.bytecounter_la1_inst_1.next_then_reg_wen_adj_1378: 2
         loads, 2 SLICEs
          Net
         reveal_coretop_i19101.bytecounter_la1_inst_1.cnt_contig_reg_wen_adj_1379: 2
         loads, 2 SLICEs
          Net reveal_coretop_i19101.bytecounter_la1_inst_1.num_then_wen_adj_1381: 1
         loads, 1 SLICEs
          Net reveal_coretop_i19101.bytecounter_la1_inst_1.clk[1]_N_keep_enable_86:
         2 loads, 2 SLICEs
          Net reveal_coretop_i19101.bytecounter_la1_inst_1.clk[1]_N_keep_enable_84:
         16 loads, 16 SLICEs
          Net secured_signal_2274: 3 loads, 3 SLICEs
          Net secured_signal_2277: 1 loads, 1 SLICEs
          Net reveal_coretop_i19101.bytecounter_la1_inst_1.clk[1]_N_keep_enable_91:
         2 loads, 2 SLICEs
          Net secured_signal_2315: 1 loads, 1 SLICEs
          Net secured_signal_2316: 1 loads, 1 SLICEs
          Net secured_signal_2326: 1 loads, 1 SLICEs
          Net secured_signal_2377: 2 loads, 2 SLICEs
          Net secured_signal_2402: 2 loads, 2 SLICEs
          Net secured_signal_2407: 9 loads, 9 SLICEs
          Net secured_signal_2417: 9 loads, 9 SLICEs
          Net secured_signal_2431: 9 loads, 9 SLICEs
          Net secured_signal_2434: 9 loads, 9 SLICEs
          Net secured_signal_2446: 10 loads, 9 SLICEs
          Net secured_signal_2518: 31 loads, 31 SLICEs
          Net secured_signal_2762: 1 loads, 1 SLICEs
          Net secured_signal_2855: 2 loads, 2 SLICEs
          Net secured_signal_2923: 2 loads, 2 SLICEs
          Net secured_signal_2929: 1 loads, 1 SLICEs
       Number of LSRs:  88
          Net trigger_en[1]_N: 6 loads, 0 SLICEs

          Net jrstn: 46 loads, 45 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.n367: 208 loads, 208
         SLICEs
          Pin rstn: 30 loads, 30 SLICEs (Net: rstn_c)
          Net secured_signal_488: 1 loads, 1 SLICEs
          Net secured_signal_706: 1 loads, 1 SLICEs
          Net secured_signal_815: 1 loads, 1 SLICEs
          Net secured_signal_882: 1 loads, 1 SLICEs
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.wen_jtck: 1 loads, 1
         SLICEs
          Net secured_signal_965: 1 loads, 1 SLICEs
          Net secured_signal_1047: 1 loads, 1 SLICEs
          Net secured_signal_1060: 1 loads, 1 SLICEs
          Net secured_signal_1080: 1 loads, 1 SLICEs
          Net secured_signal_1094: 1 loads, 1 SLICEs
          Net secured_signal_1096: 1 loads, 1 SLICEs
          Net secured_signal_1098: 1 loads, 1 SLICEs
          Net secured_signal_1100: 1 loads, 1 SLICEs
          Net secured_signal_1102: 1 loads, 1 SLICEs
          Net secured_signal_1104: 1 loads, 1 SLICEs
          Net secured_signal_1106: 1 loads, 1 SLICEs
          Net secured_signal_1108: 1 loads, 1 SLICEs
          Net secured_signal_1110: 1 loads, 1 SLICEs
          Net secured_signal_1112: 1 loads, 1 SLICEs
          Net secured_signal_1114: 1 loads, 1 SLICEs
          Net secured_signal_1116: 1 loads, 1 SLICEs
          Net secured_signal_1118: 1 loads, 1 SLICEs
          Net secured_signal_1120: 1 loads, 1 SLICEs
          Net secured_signal_1122: 1 loads, 1 SLICEs
          Net secured_signal_1124: 1 loads, 1 SLICEs
          Net secured_signal_1126: 1 loads, 1 SLICEs
          Net secured_signal_1128: 1 loads, 1 SLICEs
          Net secured_signal_1130: 1 loads, 1 SLICEs
          Net secured_signal_1132: 1 loads, 1 SLICEs
          Net secured_signal_1134: 1 loads, 1 SLICEs
          Net secured_signal_1136: 1 loads, 1 SLICEs
          Net secured_signal_1138: 1 loads, 1 SLICEs
          Net secured_signal_1140: 1 loads, 1 SLICEs
          Net secured_signal_1142: 1 loads, 1 SLICEs
          Net secured_signal_1144: 1 loads, 1 SLICEs
          Net secured_signal_1146: 1 loads, 1 SLICEs
          Net secured_signal_1148: 1 loads, 1 SLICEs
          Net secured_signal_1150: 1 loads, 1 SLICEs
          Net secured_signal_1152: 1 loads, 1 SLICEs
          Net secured_signal_1154: 1 loads, 1 SLICEs
          Net secured_signal_1168: 1 loads, 1 SLICEs
          Net secured_signal_1178: 1 loads, 1 SLICEs
          Net secured_signal_1180: 1 loads, 1 SLICEs
          Net secured_signal_1182: 1 loads, 1 SLICEs
          Net secured_signal_1184: 1 loads, 1 SLICEs
          Net secured_signal_1760: 1 loads, 1 SLICEs
          Net reveal_coretop_i19101.bytecounter_la1_inst_1.n323: 197 loads, 197
         SLICEs
          Net secured_signal_1985: 1 loads, 1 SLICEs
          Net secured_signal_2117: 1 loads, 1 SLICEs
          Net secured_signal_2520: 1 loads, 1 SLICEs
          Net secured_signal_2528: 1 loads, 1 SLICEs

          Net secured_signal_2574: 1 loads, 1 SLICEs
          Net secured_signal_2593: 1 loads, 1 SLICEs
          Net secured_signal_2612: 1 loads, 1 SLICEs
          Net secured_signal_2614: 1 loads, 1 SLICEs
          Net secured_signal_2616: 1 loads, 1 SLICEs
          Net secured_signal_2618: 1 loads, 1 SLICEs
          Net secured_signal_2620: 1 loads, 1 SLICEs
          Net secured_signal_2622: 1 loads, 1 SLICEs
          Net secured_signal_2624: 1 loads, 1 SLICEs
          Net secured_signal_2626: 1 loads, 1 SLICEs
          Net secured_signal_2628: 1 loads, 1 SLICEs
          Net secured_signal_2630: 1 loads, 1 SLICEs
          Net secured_signal_2632: 1 loads, 1 SLICEs
          Net secured_signal_2634: 1 loads, 1 SLICEs
          Net secured_signal_2636: 1 loads, 1 SLICEs
          Net secured_signal_2638: 1 loads, 1 SLICEs
          Net secured_signal_2640: 1 loads, 1 SLICEs
          Net secured_signal_2642: 1 loads, 1 SLICEs
          Net secured_signal_2644: 1 loads, 1 SLICEs
          Net secured_signal_2646: 1 loads, 1 SLICEs
          Net secured_signal_2648: 1 loads, 1 SLICEs
          Net secured_signal_2650: 1 loads, 1 SLICEs
          Net secured_signal_2652: 1 loads, 1 SLICEs
          Net secured_signal_2654: 1 loads, 1 SLICEs
          Net secured_signal_2656: 1 loads, 1 SLICEs
          Net secured_signal_2658: 1 loads, 1 SLICEs
          Net secured_signal_2660: 1 loads, 1 SLICEs
          Net secured_signal_2662: 1 loads, 1 SLICEs
          Net secured_signal_2664: 1 loads, 1 SLICEs
          Net reveal_coretop_i19101.bytecounter_la1_inst_1.tt_wen_N_1231: 1 loads, 1
         SLICEs
          Net secured_signal_3079: 1 loads, 1 SLICEs
          Net trigger1_N_1062: 1 loads, 1 SLICEs
          Net trigger2_N_1064: 1 loads, 1 SLICEs
       Top 10 highest fanout non-clock nets:
          Net reveal_coretop_i19101.bytecounter_la0_inst_0.n367: 208 loads
          Net reveal_coretop_i19101.bytecounter_la1_inst_1.n323: 198 loads
          Net reveal_coretop_i19101.capture_dr: 115 loads
          Net reveal_coretop_i19101.capture_dr_adj_1545: 98 loads
          Net ip_enable0: 91 loads
          Net ip_enable1: 76 loads
          Net secured_signal_1347: 64 loads
          Net trigger_en[1]_N: 57 loads
          Net jtaghub_inst.jtdo2_int_m15: 55 loads
          Net reveal_coretop_i19101.n446: 54 loads

       Number of warnings:  0
       Number of errors:    0

       Number of warnings:  0
       Number of errors:    0

    Design Errors/Warnings

       No errors or warnings present.

    IO (PIO) Attributes

    +---------------------+-----------+-----------+-------+-------+-----------+
    | IO Name             | Direction | Levelmode |  IO   |  IO   | Special   |
    |                     |           |  IO_TYPE  |  REG  |  DDR  | IO Buffer |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | TDI                 | INPUT     |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | TCK                 | INPUT     |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | TMS                 | INPUT     |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | TDO                 | OUTPUT    |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | led[6]              | OUTPUT    |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | led[7]              | OUTPUT    |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | led[5]              | OUTPUT    |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | led[4]              | OUTPUT    |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | led[3]              | OUTPUT    |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | led[2]              | OUTPUT    |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | led[1]              | OUTPUT    |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | led[0]              | OUTPUT    |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | clk_p               | INPUT     | LVSTLD_II |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | rstn                | INPUT     |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+

    Removed logic

    Block jtaghub_inst/IP_ENABLE_reg[17].ff_inst undriven or does not drive anything
         - clipped.
    Block jtaghub_inst/IP_ENABLE_reg[16].ff_inst undriven or does not drive anything
         - clipped.
    Block jtaghub_inst/IP_ENABLE_reg[15].ff_inst undriven or does not drive anything
         - clipped.
    Block jtaghub_inst/IP_ENABLE_reg[14].ff_inst undriven or does not drive anything
         - clipped.
    Block jtaghub_inst/IP_ENABLE_reg[13].ff_inst undriven or does not drive anything
         - clipped.
    Block jtaghub_inst/IP_ENABLE_reg[12].ff_inst undriven or does not drive anything
         - clipped.
    Block jtaghub_inst/IP_ENABLE_fast_reg[11].ff_inst undriven or does not drive
         anything - clipped.
    Block jtaghub_inst/IP_ENABLE_reg[11].ff_inst undriven or does not drive anything
         - clipped.
    Block jtaghub_inst/IP_ENABLE_fast_reg[3].ff_inst undriven or does not drive
         anything - clipped.
    Block jtaghub_inst/jtdo2_int_m15_N_2L1_cZ undriven or does not drive anything -
         clipped.

    Block i2 was optimized away.
    Block i1 was optimized away.
    Block i11_1_lut was optimized away.
    Block reveal_coretop_i19101/jtck_N_keep_I_0 was optimized away.
    Block jtaghub_inst/IP_ENABLE_0_.CN was optimized away.
    Block jtaghub_inst/OBZ_inst_RNO was optimized away.
    Block jtaghub_inst/jtagg_u_RNI1T52 was optimized away.
    Block jtaghub_inst/jtdo2_int_m11_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m11_1_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m8_1_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m11_1_0_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m2_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m2_1_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m5_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m5_1_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m2_bm_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m5_bm_cZ was optimized away.

    ASIC Components
    ---------------

    Instance Name: jtaghub_inst/jtagg_u
             Type: CONFIG_JTAG_CORE
    Instance Name: secured_comp_683
             Type: EBR_CORE
    Instance Name: secured_comp_684
             Type: EBR_CORE
    Instance Name: secured_comp_2089
             Type: EBR_CORE

    GSR Usage
    ---------

    GSR Component:
       The Global Set Reset (GSR) resource has been used to implement a global reset
            of the design. The reset signal used for GSR control is 'jrstn'.

    GSR Property:
       The design components with GSR property set to ENABLED will respond to global
            set reset while the components with GSR property set to DISABLED will
            not.

    Components with disabled GSR Property
    -------------------------------------

    These components have the GSR property set to DISABLED. The components will not
         respond to the reset signal 'jrstn' via the GSR component.

    Type and number of components of the type:
       Register = 1035
       EBR_CORE = 3

    Type and instance name of component:
       Register : jtaghub_inst.rom_rd_addr_reg[0].ff_inst
       Register : jtaghub_inst.rom_rd_addr_reg[1].ff_inst
       Register : jtaghub_inst.rom_rd_addr_reg[2].ff_inst
       Register : jtaghub_inst.rom_rd_addr_reg[3].ff_inst
       Register : jtaghub_inst.rom_rd_addr_reg[4].ff_inst
       Register : jtaghub_inst.rom_rd_addr_reg[5].ff_inst
       Register : jtaghub_inst.jshift_d1.ff_inst
       Register : jtaghub_inst.jce1_d1_reg.ff_inst
       Register : jtaghub_inst.id_enable_reg.ff_inst

       Register : jtaghub_inst.er1_shift_reg_reg[1].ff_inst
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       Register : secured_comp_2159
       Register : secured_comp_2160
       Register : secured_comp_2161
       Register : secured_comp_2162
       Register : secured_comp_2163
       Register : secured_comp_2164
       Register : secured_comp_2165
       Register : secured_comp_2166
       Register : secured_comp_2167
       Register : secured_comp_2168
       Register : secured_comp_2169
       Register : secured_comp_2170
       Register : secured_comp_2171
       Register : secured_comp_2172
       Register : secured_comp_2173
       Register : secured_comp_2174
       Register : secured_comp_2175
       Register : secured_comp_2176
       Register : secured_comp_2177
       Register : secured_comp_2178
       Register : secured_comp_2179
       Register : secured_comp_2180

       Register : secured_comp_2181
       Register : secured_comp_2182
       Register : secured_comp_2183
       Register : secured_comp_2184
       Register : secured_comp_2185
       Register : secured_comp_2186
       Register : secured_comp_2187
       Register : secured_comp_2188
       Register : secured_comp_2189
       Register : secured_comp_2190
       Register : secured_comp_2191
       Register : secured_comp_2192
       Register : secured_comp_2193
       Register : secured_comp_2194
       Register : secured_comp_2195
       Register : secured_comp_2196
       Register : secured_comp_2197
       Register : secured_comp_2198
       Register : secured_comp_2199
       Register : secured_comp_2200
       Register : secured_comp_2201
       Register : secured_comp_2202
       Register : secured_comp_2203
       Register : secured_comp_2204
       Register : secured_comp_2205
       Register : secured_comp_2206
       Register : secured_comp_2207
       Register : secured_comp_2208
       Register : secured_comp_2209
       Register : secured_comp_2210
       Register : secured_comp_2211
       Register : secured_comp_2212
       Register : secured_comp_2213
       Register : secured_comp_2214
       Register : secured_comp_2215
       Register : secured_comp_2216
       Register : secured_comp_2217
       Register : secured_comp_2218
       Register : secured_comp_2219
       Register : secured_comp_2220
       Register : secured_comp_2221
       Register : secured_comp_2222
       Register : secured_comp_2223
       Register : secured_comp_2224
       Register : secured_comp_2225
       Register : secured_comp_2226
       Register : secured_comp_2227
       Register : secured_comp_2228
       Register : secured_comp_2229
       Register : secured_comp_2230
       Register : secured_comp_2231
       Register : secured_comp_2232
       Register : secured_comp_2233
       Register : secured_comp_2234
       Register : secured_comp_2235
       Register : secured_comp_2236
       Register : secured_comp_2237

       Register : secured_comp_2238
       Register : secured_comp_2239
       Register : secured_comp_2240
       Register : secured_comp_2241
       Register : secured_comp_2242
       Register : secured_comp_2243
       Register : secured_comp_2244
       Register : secured_comp_2245
       Register : secured_comp_2246
       Register : secured_comp_2247
       Register : secured_comp_2248
       Register : secured_comp_2249
       Register : secured_comp_2250
       Register : secured_comp_2251
       Register : secured_comp_2252
       Register : secured_comp_2253
       Register : secured_comp_2254
       Register : secured_comp_2255
       Register : secured_comp_2256
       Register : secured_comp_2257
       Register : secured_comp_2258
       Register : secured_comp_2562
       Register : secured_comp_2563
       Register : secured_comp_2567
       Register : secured_comp_2568
       Register : secured_comp_2569
       Register : secured_comp_2573
       Register : secured_comp_2574
       Register : secured_comp_2575
       Register : secured_comp_2576
       Register : secured_comp_2577
       Register : secured_comp_2578
       Register : secured_comp_2579
       Register : secured_comp_2580
       Register : secured_comp_2581
       Register : secured_comp_2582
       Register : secured_comp_2583
       Register : secured_comp_2584
       Register : secured_comp_2585
       Register : secured_comp_2586
       Register : secured_comp_2587
       Register : secured_comp_2588
       Register : secured_comp_2589
       Register : secured_comp_2590
       Register : secured_comp_2591
       Register : secured_comp_2592
       Register : secured_comp_2593
       Register : secured_comp_2594
       Register : secured_comp_2595
       Register : secured_comp_2596
       Register : secured_comp_2597
       Register : secured_comp_2598
       Register : secured_comp_2599
       Register : secured_comp_2600
       Register : secured_comp_2601
       Register : secured_comp_2602
       Register : secured_comp_2603

       Register : secured_comp_2607
       Register : secured_comp_2608
       Register : secured_comp_2609
       Register : secured_comp_2610
       Register : secured_comp_2611
       Register : secured_comp_2612
       Register : secured_comp_2613
       Register : secured_comp_2614
       Register : secured_comp_2615
       Register : secured_comp_2616
       Register : secured_comp_2620
       Register : secured_comp_2621
       Register : secured_comp_2622
       Register : secured_comp_2626
       Register : secured_comp_2627
       Register : secured_comp_2628
       Register : secured_comp_2629
       Register : secured_comp_2630
       Register : secured_comp_2631
       Register : secured_comp_2641
       Register : secured_comp_2642
       Register : secured_comp_2643
       Register : secured_comp_2644
       Register : secured_comp_2645
       Register : secured_comp_2646
       Register : secured_comp_2647
       Register : secured_comp_2648
       Register : secured_comp_2649
       Register : secured_comp_2650
       Register : secured_comp_2654
       Register : secured_comp_2655
       Register : secured_comp_2656
       Register : secured_comp_2657
       Register : secured_comp_2658
       Register : secured_comp_2659
       Register : secured_comp_2660
       Register : secured_comp_2661
       Register : secured_comp_2662
       Register : secured_comp_2663
       Register : secured_comp_2664
       Register : secured_comp_2665
       Register : secured_comp_2666
       Register : secured_comp_2667
       Register : secured_comp_2668
       Register : secured_comp_2675
       Register : secured_comp_2676
       Register : secured_comp_2677
       Register : secured_comp_2678
       Register : secured_comp_2679
       Register : secured_comp_2680
       Register : secured_comp_2681
       Register : secured_comp_2682
       Register : secured_comp_2683
       Register : secured_comp_2684
       Register : secured_comp_2688
       Register : secured_comp_2695
       Register : secured_comp_2696

       Register : secured_comp_2697
       Register : secured_comp_2698
       Register : secured_comp_2699
       Register : secured_comp_2700
       Register : secured_comp_2704
       Register : secured_comp_2705
       Register : secured_comp_2706
       Register : secured_comp_2707
       Register : secured_comp_2708
       Register : secured_comp_2709
       Register : secured_comp_2710
       Register : secured_comp_2711
       Register : secured_comp_2712
       Register : secured_comp_2713
       Register : secured_comp_2714
       Register : secured_comp_2715
       Register : secured_comp_2716
       Register : secured_comp_2720
       Register : secured_comp_2721
       Register : secured_comp_2722
       Register : secured_comp_2723
       Register : secured_comp_2724
       Register : secured_comp_2725
       Register : secured_comp_2726
       Register : secured_comp_2727
       Register : secured_comp_2728
       Register : secured_comp_2729
       Register : secured_comp_2736
       Register : secured_comp_2737
       Register : secured_comp_2738
       Register : secured_comp_2739
       Register : secured_comp_2740
       Register : secured_comp_2741
       Register : secured_comp_2742
       Register : secured_comp_2743
       Register : secured_comp_2744
       Register : secured_comp_2745
       Register : secured_comp_2746
       Register : secured_comp_2747
       Register : secured_comp_2748
       Register : secured_comp_2749
       Register : secured_comp_2750
       Register : secured_comp_2751
       Register : secured_comp_2752
       Register : secured_comp_2753
       Register : secured_comp_2754
       Register : secured_comp_2755
       Register : secured_comp_2756
       Register : secured_comp_2757
       Register : secured_comp_2758
       Register : secured_comp_2759
       Register : secured_comp_2760
       Register : secured_comp_2761
       Register : secured_comp_2762
       Register : secured_comp_2763
       Register : secured_comp_2764
       Register : trigger1_I_0_2.ff_inst

       Register : trigger2_I_0_2.ff_inst
       Register : cntBits_23__I_26.ff_inst
       Register : cntBits_23__I_14.ff_inst
       Register : cntBits_i27.ff_inst
       Register : cntBits_i26.ff_inst
       Register : cntBits_i25.ff_inst
       Register : cntBits_i24.ff_inst
       Register : cntBits_23__I_0_2.ff_inst
       Register : cntBits_23__I_4.ff_inst
       Register : cntBits_23__I_5.ff_inst
       Register : cntBits_23__I_6.ff_inst
       Register : cntBits_23__I_7.ff_inst
       Register : cntBits_23__I_8.ff_inst
       Register : cntBits_23__I_9.ff_inst
       Register : cntBits_23__I_10.ff_inst
       Register : cntBits_23__I_11.ff_inst
       Register : cntBits_23__I_12.ff_inst
       Register : cntBits_23__I_15.ff_inst
       Register : cntBits_23__I_16.ff_inst
       Register : cntBits_23__I_17.ff_inst
       Register : cntBits_23__I_18.ff_inst
       Register : cntBits_23__I_19.ff_inst
       Register : cntBits_23__I_20.ff_inst
       Register : cnt2bits_23__I_49.ff_inst
       Register : cntBits_23__I_21.ff_inst
       Register : cntBits_23__I_22.ff_inst
       Register : cntBits_23__I_23.ff_inst
       Register : cntBits_23__I_24.ff_inst
       Register : cntBits_23__I_25.ff_inst
       Register : cnt2bits_23__I_48.ff_inst
       Register : cnt2bits_23__I_47.ff_inst
       Register : cnt2bits_23__I_46.ff_inst
       Register : cnt2bits_23__I_45.ff_inst
       Register : cnt2bits_23__I_44.ff_inst
       Register : cnt2bits_23__I_43.ff_inst
       Register : cnt2bits_23__I_42.ff_inst
       Register : cnt2bits_23__I_41.ff_inst
       Register : cnt2bits_23__I_40.ff_inst
       Register : cnt2bits_23__I_39.ff_inst
       Register : cnt2bits_23__I_38.ff_inst
       Register : cnt2bits_23__I_37.ff_inst
       Register : cnt2bits_23__I_36.ff_inst
       Register : cnt2bits_23__I_35.ff_inst
       Register : cnt2bits_23__I_34.ff_inst
       Register : cnt2bits_23__I_33.ff_inst
       Register : cnt2bits_23__I_32.ff_inst
       Register : cnt2bits_23__I_31.ff_inst
       Register : cnt2bits_23__I_30.ff_inst
       Register : cnt2bits_23__I_29.ff_inst
       Register : cnt2bits_23__I_28.ff_inst
       Register : cnt2bits_23__I_27.ff_inst
       Register : cnt2bits_23__I_0_2.ff_inst
       Register : cnt2bits_e3_e3_i0_i24.ff_inst
       Register : cnt2bits_e3_e3_i0_i25.ff_inst
       Register : cnt2bits_e3_e3_i0_i26.ff_inst
       Register : cnt2bits_e3_e3_i0_i27.ff_inst
       Register : cntBits_23__I_13.ff_inst

       EBR_CORE : secured_comp_683
       EBR_CORE : secured_comp_684
       EBR_CORE : secured_comp_2089

    Constraint Summary
    ------------------

       Total number of constraints: 13
       Total number of constraints dropped: 0

    Run Time and Memory Usage
    -------------------------

       Total CPU Time: 5 secs
       Total REAL Time: 5 secs
       Peak Memory Usage: 612 MB

    Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
    Copyright (c) 1995
         AT&T Corp.   All rights reserved.
    Copyright (c) 1995-2001 Lucent
         Technologies Inc.  All rights reserved.
    Copyright (c) 2001 Agere Systems
         All rights reserved.
    Copyright (c) 2002-2023 Lattice Semiconductor
         Corporation,  All rights reserved.