MachXO

Related Products

複雑さからの解放ーグルーロジック、バスブリッジ、バスインターフェース、パワーアップ制御、および選択する必要のない制御ロジックにより、CPLDと低容量FPGA選択の複雑さを排除するように設計

インターフェースの拡張ー最大271個のI/Oを持つMachXOは汎用I/O拡張、インターフェース接続、起動感知機能が必要な幅広いアプリケーションに最適

無限に再構成可能ーバックグラウンドでプログラム可能な内蔵フラッシュメモリを搭載したシングルチップソリューションで、TransFR™を使用したシステム構成時に現場でのロジック更新が可能

特長

最大27.6KビットのsysMEM™内蔵ブロックRAMと最大7.7Kビットの分散RAM
SRAMベースのロジックは、JTAGポートをしようしてミリ秒単位で再構成可能
IOはLVCMOS, LVTTL, PCI, LVDS, Bus-LVDS, LVPECL, RSDS対応
クロック乗算、分割、位相シフトを可能にするデバイスあたり最大2つのアナログPLL

ファミリーテーブル

MachXOデバイス選択ガイド

パラメーター	LCMXO256E	LCMXO256C	LCMXO640E	LCMXO640C	LCMXO1200E	LCMXO1200C	LCMXO2280E	LCMXO2280C
LUT数	256	256	640	640	1200	1200	2280	2280
EBR SRAMブロック	-	-	-	-	1	1	3	3
EBR SRAM (Kビット)	-	-	-	-	9.2	9.2	27.6	27.6
分散型RAM (Kビット)	2	2	6.1	6.1	6.4	6.4	7.7	7.7
PLL + DLL	-	-	-	-	1 + 0	1 + 0	2 + 0	2 + 0
構成メモリー	内部Flash	内部Flash	内部Flash	内部Flash	内部Flash	内部Flash	内部Flash	内部Flash
デュアルブート¹	あり	あり	あり	あり	あり	あり	あり	あり
コアVcc 1.2 V	あり	-	あり	-	あり	-	あり	-
コアVcc 1.8 - 3.3 V	-	あり	-	あり	-	Yes	-	Yes
Temp C	あり	あり	あり	あり	あり	あり	あり	あり
Temp I	あり	あり	あり	あり	あり	あり	あり	あり
Temp AEC-Q100	あり	あり	あり	あり	あり	-	あり	-

0.5 mm 間隔 I/O カウント
	LCMXO256E	LCMXO256C	LCMXO640E	LCMXO640C	LCMXO1200E	LCMXO1200C	LCMXO2280E	LCMXO2280C
100-ball csBGA (8 x 8 mm)	78	78	74	74
132-ball csBGA (8 x 8 mm)			101	101	101	101	101	101
100-pin TQFP (14 x 14 mm)	78	78	74	74	73	73	73	73
144-pin TQFP (20 x 20 mm)			113	113	113	113	113	113

0.8 mm 間隔 I/Oカウント
	LCMXO256E	LCMXO256C	LCMXO640E	LCMXO640C	LCMXO1200E	LCMXO1200C	LCMXO2280E	LCMXO2280C
256-ball caBGA (14 x 14 mm)			159	159	211	211	211	211

1.0 mm間隔 I/Oカウント
	LCMXO256E	LCMXO256C	LCMXO640E	LCMXO640C	LCMXO1200E	LCMXO1200C	LCMXO2280E	LCMXO2280C
256-ball ftBGA (17 x 17 mm)			159	159	211	211	211	211
324-ball ftBGA (19 x 19 mm)							271	271

1. デュアルブートは外部ブートフラッシュ対応

ラティス車載機器 (AEC-Q100資格) MachXO デバイス選択ガイド

パラメータ	LAMXO256E/C	LAMXO640E/C	LAMXO1200E	LAMXO2280E
LUT数	256	647	1200	2280
分散RAM (Kビット)	2.0	6.0	6.25	7.5
EBR SRAM (Kビット)	0	0	9.2	27.6
EBR SRAM ブロック数 (9 Kビット)	0	0	1	3
V_CC 電圧	1.2/1.8/2.5/3.3V	1.2/1.8/2.5/3.3V	1.2	1.2
PLL数	0	0	1	2
最大 I/O数	78	159	211	271

0.5 mm 間隔 I/O カウント
	LAMXO256E/C	LAMXO640E/C	LAMXO1200E	LAMXO2280E
100-pin Lead-Free TQFP (14 x 14 mm)	78	74	73	73
144-pin Lead-Free TQFP (20 x 20 mm)	-	113	113	113

1.0 mm 間隔 I/O カウント
	LAMXO256E/C	LAMXO640E/C	LAMXO1200E	LAMXO2280E
256-ball Lead-Free ftBGA (17 x 17 mm)	-	159	211	211
324-ball Lead-Free ftBGA (19 x 19 mm)	-	-	-	271

デザインリソース

IP＆リファレンスデザイン

プレテスト、再利用可能な機能を利用して設計の労力を軽減

MachXOのIPとリファレンスデザイン

ソフトウェア

使いやすい設計フローの完全版

すべてのソフトウェアを見る

開発キット＆ボード

当社の開発キットとボードで設計プロセスの合理化

MachXOの開発キット＆ボード

プログラミング　ハードウェア

当社のプログラミングハードウェアでインシステム・プログラミング、インサーキット再構成の負担を軽減

MachXOのプログラミング　ハードウェア

ドキュメント

Quick Reference

Technical Resources

Information Resources

Downloads

TITLE	NUMBER	VERSION	DATE	FORMAT	SIZE
Select All
Input Hysteresis in Lattice CPLD and FPGA Devices	TN1112	1.1	9/1/2006	PDF	465.6 KB
LA-MachXO Automotive Family Data Sheet	FPGA-DS-02070	1.6	1/22/2021	PDF	3 MB
Lattice OrCAD Capture Schematic Library This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.	FPGA-SC-02005	9.1	6/26/2026	ZIP	3.3 MB
Linking or Selecting Ports with BSCAN2	FPGA-AN-02013	1.1	1/10/2022	PDF	680.9 KB
MachXO Density Migration	TN1097	1.0	9/1/2005	PDF	41.2 KB
MachXO Family Data Sheet	FPGA-DS-02071	3.3	7/30/2022	PDF	3.3 MB
MachXO Family Data Sheet (Japanese Language Version)	DS1002	02.8	6/1/2009	PDF	1.8 MB
MachXO JTAG Programming and Configuration User Guide	FPGA-TN-02167	1.5	11/8/2022	PDF	906.6 KB
MachXO sysCLOCK Design and Usage Guide	TN1089	1.5	9/26/2011	PDF	1 MB
MachXO sysIO Usage Guide	TN1091	1.5	9/15/2010	PDF	425.4 KB
Memory Usage Guide for MachXO Devices	TN1092	1.5	10/1/2010	PDF	1.4 MB
Minimizing System Interruption During Configuration Using TransFR Technology	FPGA-TN-02198	4.6	12/11/2025	PDF	1.6 MB
Package Diagrams	FPGA-DS-02053	8.8	7/14/2026	PDF	9.6 MB
Parallel Flash Programming and FPGA Configuration - Source Code For use with Application Note - AN8077	AN8077	1.3	1/4/2013	RAR	1.4 MB
PCB Layout Recommendations for BGA Packages	FPGA-TN-02024	5.6	12/10/2024	PDF	6.2 MB
Power Estimation and Management for MachXO Devices	TN1090	1.1	9/1/2007	PDF	1.9 MB
Solder Reflow Guide for Surface Mount Devices	FPGA-TN-02041	5.3	5/6/2026	PDF	753.9 KB
Thermal Management	FPGA-TN-02044	6.0	8/19/2026	PDF	976.2 KB
USB Programming and Circuit Guide	FPGA-AN-02015	1.2	1/22/2021	PDF	1.4 MB
Using a Discrete Crystal as a PLD Clock Source	FPGA-AN-02016	1.1	6/21/2021	PDF	672.5 KB
Using Multiple Boundary Scan Port Linker (BSCAN2)	FPGA-AN-02017	1.1	1/9/2022	PDF	774.3 KB
Wafer-Level Chip-Scale Package Guide	FPGA-TN-02312	1.1	6/23/2022	PDF	236.5 KB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.

TITLE	NUMBER	VERSION	DATE	FORMAT	SIZE
Select All
LA-MachXO Automotive Family Data Sheet	FPGA-DS-02070	1.6	1/22/2021	PDF	3 MB
MachXO Family Data Sheet	FPGA-DS-02071	3.3	7/30/2022	PDF	3.3 MB
MachXO Family Data Sheet (Japanese Language Version)	DS1002	02.8	6/1/2009	PDF	1.8 MB

TITLE	NUMBER	VERSION	DATE	FORMAT	SIZE
Select All
Input Hysteresis in Lattice CPLD and FPGA Devices	TN1112	1.1	9/1/2006	PDF	465.6 KB
Linking or Selecting Ports with BSCAN2	FPGA-AN-02013	1.1	1/10/2022	PDF	680.9 KB
MachXO Density Migration	TN1097	1.0	9/1/2005	PDF	41.2 KB
MachXO JTAG Programming and Configuration User Guide	FPGA-TN-02167	1.5	11/8/2022	PDF	906.6 KB
MachXO sysCLOCK Design and Usage Guide	TN1089	1.5	9/26/2011	PDF	1 MB
MachXO sysIO Usage Guide	TN1091	1.5	9/15/2010	PDF	425.4 KB
Memory Usage Guide for MachXO Devices	TN1092	1.5	10/1/2010	PDF	1.4 MB
Migrating Designs from AMD CPLD/FPGA Devices to Lattice FPGA Devices	FPGA-AN-02081	1.2	7/15/2026	PDF	2.8 MB
Minimizing System Interruption During Configuration Using TransFR Technology	FPGA-TN-02198	4.6	12/11/2025	PDF	1.6 MB
Parallel Flash Programming and FPGA Configuration - Source Code For use with Application Note - AN8077	AN8077	1.3	1/4/2013	RAR	1.4 MB
PCB Layout Recommendations for BGA Packages	FPGA-TN-02024	5.6	12/10/2024	PDF	6.2 MB
Power Estimation and Management for MachXO Devices	TN1090	1.1	9/1/2007	PDF	1.9 MB
Solder Reflow Guide for Surface Mount Devices	FPGA-TN-02041	5.3	5/6/2026	PDF	753.9 KB
Thermal Management	FPGA-TN-02044	6.0	8/19/2026	PDF	976.2 KB
USB Programming and Circuit Guide	FPGA-AN-02015	1.2	1/22/2021	PDF	1.4 MB
Using a Discrete Crystal as a PLD Clock Source	FPGA-AN-02016	1.1	6/21/2021	PDF	672.5 KB
Using Multiple Boundary Scan Port Linker (BSCAN2)	FPGA-AN-02017	1.1	1/9/2022	PDF	774.3 KB
Wafer-Level Chip-Scale Package Guide	FPGA-TN-02312	1.1	6/23/2022	PDF	236.5 KB

TITLE	NUMBER	VERSION	DATE	FORMAT	SIZE
Select All
Package Diagrams	FPGA-DS-02053	8.8	7/14/2026	PDF	9.6 MB

TITLE	NUMBER	VERSION	DATE	FORMAT	SIZE
Select All
MachXO 2280 Breakout Board Evaluation Kit User's Guide	FPGA-EB-02038	1.2	6/28/2021	PDF	2.4 MB
PCI IP Core User's Guide PCI Core User Guide for LatticeSC, LatticeECP3, LatticeECP2/M, LatticeECP/EC, LatticeXP, Mach XO, and MachXO2	IPUG18	9.2	11/8/2010	PDF	4.6 MB
POWR1014A Breakout Board Evaluation Kit User's Guide	EB64	01.1	2/13/2012	PDF	1.3 MB

TITLE	NUMBER	VERSION	DATE	FORMAT	SIZE
Select All
8b/10b Encoder/Decoder - Documentation	FPGA-RD-02103	1.5	1/29/2021	PDF	940.3 KB
8b/10b Encoder/Decoder - Source Code		1.4	1/29/2021	ZIP	1.9 MB
Advanced SDR SDRAM Controller - Design Documentation	FPGA-RD-02087	4.9	1/22/2021	PDF	1.1 MB
Advanced SDR SDRAM Controller - Source Code	RD1010	4.8	9/12/2014	ZIP	495.7 KB
Arbitration and Switching Between Bus Masters - Documentation	FPGA-RD-02104	1.2	1/21/2021	PDF	952.5 KB
Arbitration and Switching Between Bus Masters - Source code	RD1067	1.1	2/22/2010	ZIP	284 KB
BSCAN1 - Multiple Boundary Scan Port Addressable Buffer - Documentation	FPGA-RD-02105	7.4	1/29/2021	PDF	993.7 KB
BSCAN1 - Multiple Boundary Scan Port Addressable Buffer - Source Code	RD1001	7.3	4/18/2011	ZIP	152.4 KB
BSCAN2 - Multiple Boundary Scan Port Linker - Source Code	RD1002	4.6	3/13/2014	ZIP	2.6 MB
BSCAN2 - Multiple Scan Port Linker - Documentation	FPGA-RD-02106	4.9	1/29/2021	PDF	918.1 KB
CompactFlash Controller - Documentation	FPGA-RD-02088	1.4	1/22/2021	PDF	1.7 MB
CompactFlash Controller - Source Code	RD1040	1.4	11/8/2010	ZIP	1.5 MB
Control Link Serial Interface - Documentation	FPGA-RD-02089	1.5	1/22/2021	PDF	810.2 KB
Control Link Serial Interface - Source Code	RD1051	1.4	11/8/2010	ZIP	240.7 KB
Delta Sigma ADC - Documentation	RD1063	1.0	10/19/2009	PDF	110.9 KB
Fast Page Mode SDRAM Controller - Documentation	FPGA-RD-02090	2.4	1/22/2021	PDF	887.1 KB
Fast Page Mode SDRAM Controller - Source Code	RD1014	2.3	11/8/2010	ZIP	110.4 KB
GPIO Expander, Documentation	RD1065	1.3	4/12/2011	PDF	280.6 KB
GPIO Expander, Source Code	RD1065	1.3	4/12/2011	ZIP	195.5 KB
I2C (Inter-Integrated Circuit) Master Controller - Documentation	RD1005	5.8	3/6/2014	PDF	987.4 KB
I2C (Inter-Integrated Circuit) Master Controller - Source Code	RD1005	5.9	1/10/2015	ZIP	809.7 KB
I2C Controller for Serial EEPROMs - Documentation	RD1006	2.6	3/5/2014	PDF	767.9 KB
I2C Controller for Serial EEPROMs - Source Code	RD1006	2.7	1/12/2015	ZIP	613.5 KB
I2C Master with WISHBONE Bus Interface - Documentation	RD1046	1.6	1/15/2015	PDF	1.4 MB
I2C Master with WISHBONE Bus Interface - Source Code	RD1046	1.8	2/1/2016	ZIP	1.4 MB
I2S Controller with WISHBONE Interface Reference Design - Source Code	RD1101	1.1	3/1/2014	ZIP	1.6 MB
I2S Controller with WISHBONE Interface Reference Design Documentation	RD1101	1.1	3/1/2014	PDF	2.4 MB
IDE/ATA Interface Controller - WISHBONE Compatible - Documentation	RD1095	1.0	6/28/2010	PDF	769.8 KB
IDE/ATA Interface Controller - WISHBONE Compatible - Source Code	RD1095	1.0	6/28/2010	ZIP	756.3 KB
LatticeMico8 to WISHBONE Interface Adapter - Documentation	RD1043	1.1	2/23/2010	PDF	126.2 KB
LatticeMico8 to WISHBONE Interface Adapter - Source Code	RD1043	1.1	2/23/2010	ZIP	109.3 KB
LatticeMico8 v3.0 Verilog		3.0	2/19/2008	ZIP	1.1 MB
LatticeMico8 v3.1 Verilog	RD1026	3.1	4/9/2010	ZIP	913.9 KB
LED/OLED Driver - Documentation	RD1103	1.1	3/1/2014	PDF	989.6 KB
LED/OLED Driver - Source code	RD1103	1.1	3/1/2014	ZIP	1.4 MB
LPC (Low Pin Count) Bus Controller - Source Code	RD1049	1.6	4/12/2011	ZIP	517.2 KB
LPC (Low Pin Count) Bus Controller Reference Design - Documentation	FPGA-RD-02114	1.7	1/21/2021	PDF	1 MB
MachXO 2280 Breakout Board Evaluation Kit Source Code This demo includes the Lattice Diamond project source for the preprogrammed demonstration design. It programs the LCMXO2280-FTN256 with a counter circuit using the embedded oscillator timer and sysIO Buffers configured for LED drive		1.0	3/21/2011	ZIP	10.7 KB
MDIO (Management Data Input/Output Interface) Peripheral - WISHBONE Compatible	FPGA-RD-02130	1.2	1/31/2021	PDF	1021 KB
MDIO Peripheral - WISHBONE Compatible - Source Code	RD1074	1.1	2/19/2010	ZIP	354.1 KB
NAND Flash Controller - Source Code	RD1055	1.4	11/8/2014	ZIP	912.7 KB
NAND Flash Controller Design - Documentation	FPGA-RD-02095	1.3	1/22/2021	PDF	1.6 MB
NOR Flash Memory Controller with WISHBONE Interface - Documentation	FPGA-RD-02096	1.2	1/22/2021	PDF	1.6 MB
NOR Flash Memory Controller with WISHBONE Interface - Source Code	RD1087	1.1	11/8/2010	ZIP	198.1 KB
PCI Target (33MHz, 32 Bit ) - Source Code	RD1008	3.5	8/20/2013	ZIP	980.4 KB
PCI Target 32-bit/33MHz	FPGA-RD-02134	3.6	1/31/2021	PDF	1.8 MB
PCI to NOR Flash Interface	RD1050	1.1	3/10/2010	PDF	367.9 KB
PCI to NOR Flash Interface - Source Code	RD1050	1.1	3/10/2010	ZIP	3.8 MB
PCI/WISHBONE Bridge	FPGA-RD-02135	1.4	2/5/2021	PDF	1.2 MB
PCI/WISHBONE Bridge - Source Code	RD1045	1.3	4/10/2011	ZIP	4.5 MB
Power Management Bus Reference Design - Source Code	RD1100	1.1	12/23/2011	ZIP	378.3 KB
Power Management Bus Reference Design Documentation	FPGA-RD-02097	1.2	1/22/2021	PDF	1.1 MB
Power Supply Fault Logging - Documentation	RD1062	1.2	6/30/2010	PDF	127.8 KB
Power Supply Fault Logging - Source Code	RD1062	1.2	6/30/2010	ZIP	123.4 KB
PWM Fan Controller	RD1060	1.6	9/10/2014	PDF	481.5 KB
PWM Fan Controller - Source Code	RD1060	1.7	1/16/2015	ZIP	2.9 MB
RD1026 LatticeMico8 Microcontroller User's Guide		2.1	11/8/2014	PDF	2.1 MB
Read and Write Usercode - Documentation	RD1041	1.4	9/17/2014	PDF	831.5 KB
Read and Write Usercode - Source Code	RD1041	1.3	3/1/2014	ZIP	618.2 KB
SD Flash Controller - Documentation	RD1048	1.1	1/29/2010	PDF	1.7 MB
SD Flash Controller Using SD Bus - Documentation	RD1088	1.4	3/12/2014	PDF	1.4 MB
SD Flash Controller Using SD Bus - Source Code	RD1088	1.4	3/12/2014	ZIP	5 MB
Simple Sigma-Delta ADC - Source Code		1.5	9/26/2018	ZIP	1.5 MB
Simple Sigma-Delta ADC, Documentation	FPGA-RD-02047	1.6	1/30/2020	PDF	971 KB
Single-Wire Controller for Digital Temp Sensors Reference Design - Source Code	RD1099	1.0	11/8/2010	ZIP	513.1 KB
Single-Wire Controller for Digital Temp. Sensors Reference Design - Documentation	FPGA-RD-02099	1.1	1/22/2021	PDF	1.1 MB
SMBus Controller Reference Design - Documentation	FPGA-RD-02100	1.1	1/22/2021	PDF	1.3 MB
SMBus Controller Reference Design Source Code	RD1098	1.0	11/8/2010	ZIP	2.2 MB
SPI Flash Controller with Wear Leveling	FPGA-RD-02101	1.1	1/29/2021	PDF	1 MB
SPI Flash Controller with Wear Leveling - Source code	RD1102	1.0	11/8/2010	ZIP	952.2 KB
SPI WISHBONE Controller - Documentation	RD1044	1.7	3/1/2014	PDF	960 KB
SPI WISHBONE Controller - Source Code	RD1044	1.8	1/12/2015	ZIP	477.7 KB
UART (Universal Asynchronous Receiver/Transmitter) - Source Code			7/15/2025	ZIP	772.5 KB
Wake on LAN - Documentation	RD1096	1.0	6/24/2010	PDF	311.6 KB
Wake on LAN - Source Code	RD1096	1.0	6/24/2010	ZIP	283.1 KB
WISHBONE UART - Documentation	FPGA-RD-02137	1.7	2/5/2021	PDF	1.1 MB
WISHBONE UART - Source Code	RD1042	1.6	12/1/2014	ZIP	58.5 MB
WISHBONE-Compatible LCD Controller - Documentation	FPGA-RD-02102	1.3	1/29/2021	PDF	918.3 KB
WISHBONE-Compatible LCD Controller - Source Code	RD1053	1.2	11/8/2010	ZIP	140.9 KB

TITLE	NUMBER	VERSION	DATE	FORMAT	SIZE
Select All
MachXO 300 mm Fab Transition Circuit Observations Mitigation	PB1377	2.0	6/12/2017	PDF	82.7 KB

TITLE	NUMBER	VERSION	DATE	FORMAT	SIZE
Select All
ACN 05A-13 XO Transfer Mask Set	ACN05A-13		7/11/2013	PDF	118.7 KB
ACN03D-11 Withdrawal of ACN03C-11 Material Set	ANC03D-11	1	4/1/2011	PDF	796.6 KB
PCN 02A-15 Affected_OPN_Listing Discontinuance		3.0	8/12/2015	XLSX	310.4 KB
PCN 02A-15 SnPb and Select Mature Family Discontinuance		1.0	6/18/2015	PDF	316.9 KB
PCN 03C13 Alternate Qualified Assembly Test Site Alternate Qualified Material Sets ASE Taiwan Assembly Site, Material Set	PCN03C	1.0	11/14/2014	PDF	212.8 KB
PCN 09A-12 Affected Devices Assembly Site	PCN09A-12	1.0	5/14/2012	XLSX	121 KB
PCN 09A-12 Alternate Qualified Material Set, Assembly Site for Select Lattice Families	PCN09A-12	1.0	5/14/2012	PDF	160.2 KB
PCN 09A-12 Frequently Asked Questions	PCN09A-12	1.0	5/11/2012	PDF	178.9 KB
PCN 09A-12 Material Set Changes Assembly Site	PCN09A-12	1.0	5/14/2012	XLSX	121 KB
PCN02A-15 Frequently Asked Questions		2.0	6/18/2015	DOCX	60.8 KB
PCN03A-13 Alternate Qualified Assembly and Material Sets for Select Devices	PCN03A-13		6/28/2013	PDF	202.5 KB
PCN03A-13 Device Characterization Report	PCN03A-13		6/28/2013	PDF	981.3 KB
PCN03A-13 FAQs	PCN03A-13		6/28/2013	PDF	458.3 KB
PCN03A-14 Characterization Report	PCN03A-14	1.0	4/4/2014	PDF	919.5 KB
PCN03A-14 FAQ	PCN03A-14	1.0	4/4/2014	PDF	452.5 KB
PCN03A-14 Material Set Table	PCN03A-14	1.0	4/4/2014	XLSX	26.9 KB
PCN03B-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and/or Alternate Qualified Material Sets for Select Lattice Products	PCN03B-14	1.0	11/21/2014	PDF	229.9 KB
PCN03C-13 Affected Part Number and Material Sets	PCN03C-13		6/28/2013	XLSX	51.2 KB
PCN03C-14 Affected Part Number List	PCN03C-14	1.0	4/4/2014	XLSX	50.8 KB
PCN05A-14 Affected Part Number List	PCN05A-14	1.0	6/6/2014	XLSX	18.6 KB
PCN05A-14 Characterization Report	PCN05A-14	1.0	6/6/2014	PDF	499.2 KB
PCN05A-14 FAQ	PCN05A-14	1.0	6/6/2014	PDF	193.9 KB
PCN05A-14 Notification of Intent to Utilize an Alternate Qualified Foundry and Alternate Qualified Mask Sets for the MachXO Products Foundry, Mask Set	PCN05A-14	1.1	2/5/2016	PDF	154.5 KB
PCN05A-17 Affected Parts List		1.0	10/18/2017	XLSX	14.9 KB
PCN05A-17 Halogen-Free substrate at ASEM		1.2	10/27/2017	PDF	268 KB
PCN06A-14 Characterization Report	PCN06A-14	1.0	10/3/2014	PDF	563.7 KB
PCN06A-14 Material Set Table	PCN06A-14	1.0	10/3/2014	XLSX	13.7 KB
PCN06B-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and Alternate Qualified Material Sets for Select Lattice Products	PCN06B-14	1.0	11/21/2014	PDF	229.5 KB
PCN06C-11 Withdrawal of PCN06B-11 Material Set	PCN06C-11	1.0	8/1/2011	PDF	838.5 KB
PCN06C-14 Affected Device List	PCN06C-14	1.0	10/3/2014	XLSX	29.6 KB
PCN07A-14 Automotive XO foundry transfer	PCN07A-14	1.0	12/18/2014	PDF	430.8 KB
PCN07A-14 FAQ Foundry, Mask Set	PCN07A-14	1.0	12/18/2014	PDF	89.6 KB
PCN07A-14 LA-MachXO Product Family AEC-Q100 Qualification Summary	PCN07A-14	1.0	12/18/2014	PDF	638.8 KB
PCN07C-11 Withdrawal of PCN07B-11 Material Set	PCN07C-11	1.0	8/1/2011	PDF	917.9 KB
PCN08A13_AffectedDevices Other	PCN08A-13	1	9/26/2013	XLSX	78.2 KB
PCN14A-09 MachXO2280 324-ftBGA ASEM AQAS AQMS - Japanese Language	PCN14A-09	1	8/1/2009	PDF	132.1 KB
PCN14A-09 Notification of Intent to Utilize AQAS and AQMS for MachXO 324-ftBGA Devices	PCN14A-09	1	8/1/2009	PDF	41.8 KB

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Lattice OrCAD Capture Schematic Library This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.	FPGA-SC-02005	9.1	6/26/2026	ZIP	3.3 MB

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MachXO Control Development Kit Brochure	I0206	1.0	10/19/2009	PDF	1007.2 KB
MachXO Mini Development Kit Product Brief	I0199	1.0	2/23/2009	PDF	815.3 KB
MachXO Product Brief	I0176	7.0	1/14/2013	PDF	1.3 MB
MachXO Product Brief (Chinese)	I0176C	8.0	1/14/2013	PDF	1.3 MB
MachXO Product Brief (Japanese)	I0176J	7.0	4/2/2010	PDF	1.2 MB

TITLE	NUMBER	VERSION	DATE	FORMAT	SIZE
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BN256_XO		Rev R1	6/9/2022	PDF	151.4 KB
FTN256_LAXP2_LAMXO		Rev H1	6/9/2022	PDF	141.3 KB
FTN256_v1_Cu_XO_XP2		Rev. R1	6/9/2022	PDF	150.2 KB
FTN324		Rev P1	6/9/2022	PDF	153.4 KB
FTN324_LAMXO		Rev F1	6/9/2022	PDF	140.9 KB
Lattice MachXO Product Family Qualification Summary Deleted last three pages		H	1/23/2015	PDF	654.9 KB
MN100_XO		Rev Q1	6/21/2022	PDF	152.9 KB
MN132_Cu_all		Rev R1	6/21/2022	PDF	149.6 KB
TN_TG_TQ144 Cu_wire all		Rev E1	12/21/2021	PDF	107.1 KB
TN_TG100 Cu_wire all		Rev D2	12/21/2021	PDF	25.4 KB
TN100_LAMXO		Rev B	4/19/2018	PDF	22 KB
TN144_LA		Rev C	4/25/2018	PDF	22.1 KB

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Creating An ADC Using FPGA Resources		1.0	3/1/2010	PDF	272.2 KB
Dual Sensor Design Solution - White Paper (Chinese Language Version)		1.0	5/31/2012	PDF	236.6 KB
Expanding Microprocessor Connectivity Using Low-cost FPGAs		1.0	8/28/2013	PDF	474.4 KB
ispMACH 4000ZE Practical Low Power CPLD Design			8/25/2009	PDF	136.5 KB
Low Cost Board Layout Techniques for Designing with PLDs in BGA Packages		1.0	7/1/2010	PDF	443.6 KB
Low Cost Board Layout Techniques for Designing with PLDs in BGA Packages (Chinese Language)		1.0	7/1/2010	PDF	488.5 KB
MachXO PLDs in System Control Designs		1.0	10/19/2009	PDF	876.7 KB
MachXO: Optimized Programmable Devices for Bus Interfaces, Bridges and Control			7/1/2005	PDF	126.7 KB
MachXO: Platform Management Using Low-Cost Non-Volatile PLDs			2/23/2009	PDF	512.9 KB
MachXO: Platform Management Using Low-Cost Non-Volatile PLDs (Chinese Language)		1.0	6/8/2009	PDF	389.2 KB
Pre-tested Design Accelerates Development		1.0	3/1/2010	PDF	299.3 KB
Pre-tested Design Accelerates Development (Chinese Language)		1.0	6/28/2010	PDF	1.1 MB
Pre-tested Design Accelerates Development (Korean Language)		1.0	3/1/2010	PDF	1.4 MB
Pre-tested Design Accelerates Development (Traditional Chinese Language)		1.0	6/28/2010	PDF	1.2 MB
The Challenges of Automotive Vision Systems Design			4/1/2007	PDF	341.5 KB

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[BSDL] LCMXO640C ftBGA 256		1.04	4/24/2008	BSM	37.9 KB
[BSDL] LCMXO1200C caBGA 256		1.00	6/29/2009	BSM	43.8 KB
[BSDL] LCMXO1200C csBGA 132		1.03	4/16/2008	BSM	34.9 KB
[BSDL] LCMXO1200C ftBGA 256		1.02	4/16/2008	BSM	44.4 KB
[BSDL] LCMXO1200C TQFP 100		1.02	4/16/2008	BSM	32.1 KB
[BSDL] LCMXO1200C TQFP 144		1.03	4/16/2008	BSM	35.9 KB
[BSDL] LCMXO1200E caBGA 256		1.00	6/29/2009	BSM	43.2 KB
[BSDL] LCMXO1200E csBGA 132		1.03	4/16/2008	BSM	34.2 KB
[BSDL] LCMXO1200E ftBGA 256		1.02	4/16/2008	BSM	43.7 KB
[BSDL] LCMXO1200E TQFP 100		1.02	4/16/2008	BSM	31.4 KB
[BSDL] LCMXO1200E TQFP 144		1.03	4/16/2008	BSM	35.3 KB
[BSDL] LCMXO2280C caBGA 256		1.00	6/29/2009	BSM	48.1 KB
[BSDL] LCMXO2280C csBGA 132		1.03	4/16/2008	BSM	39.2 KB
[BSDL] LCMXO2280C ftBGA 256		1.03	4/16/2008	BSM	48.8 KB
[BSDL] LCMXO2280C ftBGA 324		1.03	4/16/2008	BSM	54.2 KB
[BSDL] LCMXO2280C TQFP 100		1.03	4/16/2008	BSM	36.5 KB
[BSDL] LCMXO2280C TQFP 144		1.03	4/16/2008	BSM	40.3 KB
[BSDL] LCMXO2280E caBGA 256		1.00	6/29/2009	BSM	47.6 KB
[BSDL] LCMXO2280E csBGA 132		1.03	4/16/2008	BSM	38.5 KB
[BSDL] LCMXO2280E ftBGA 256		1.03	4/16/2008	BSM	48.1 KB
[BSDL] LCMXO2280E ftBGA 324		1.03	4/16/2008	BSM	53.5 KB
[BSDL] LCMXO2280E TQFP 100		1.03	4/16/2008	BSM	35.8 KB
[BSDL] LCMXO2280E TQFP 144		1.03	4/16/2008	BSM	39.6 KB
[BSDL] LCMXO256C csBGA 100		1.04	4/16/2008	BSM	23 KB
[BSDL] LCMXO256C TQFP 100		1.04	4/16/2008	BSM	23 KB
[BSDL] LCMXO256E csBGA 100		1.04	4/16/2008	BSM	22.3 KB
[BSDL] LCMXO640C caBGA 256		1.00	6/29/2009	BSM	36.9 KB
[BSDL] LCMXO640C csBGA 100		1.04	4/16/2008	BSM	28.7 KB
[BSDL] LCMXO640C csBGA 132		1.04	4/16/2008	BSM	31.1 KB
[BSDL] LCMXO640C fpBGA 256		1.04	4/16/2008	BSM	37.8 KB
[BSDL] LCMXO640C TQFP 100		1.04	4/16/2008	BSM	28.7 KB
[BSDL] LCMXO640C TQFP 144		1.04	4/16/2008	BSM	32.1 KB
[BSDL] LCMXO640E caBGA 256		1.00	6/29/2009	BSM	36.3 KB
[BSDL] LCMXO640E csBGA 100		1.04	4/16/2008	BSM	28 KB
[BSDL] LCMXO640E csBGA 132		1.04	4/16/2008	BSM	30.5 KB
[BSDL] LCMXO640E fpBGA 256		1.04	4/16/2008	BSM	37.1 KB
[BSDL] LCMXO640E ftBGA 256		1.04	4/24/2008	BSM	37.1 KB
[BSDL] LCMXO640E TQFP 100		1.04	4/16/2008	BSM	28 KB
[BSDL] LCMXO640E TQFP 144		1.04	4/16/2008	BSM	31.5 KB

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XO Device Family DELPHI Models		1.0	9/3/2009	ZIP	318.3 KB

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[IBIS] Lattice MachXO		2.2	9/1/2009	IBS	25.5 MB

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BGA Breakout and Routing Example #1 - BN256	TN1074	1.0	12/29/2009	ZIP	926.8 KB
BGA Breakout and Routing Example #1 - MN100	TN1074	1.0	12/29/2009	ZIP	1.1 MB
BGA Breakout and Routing Example #1 - MN132	TN1074	1.0	12/29/2009	ZIP	803.6 KB
BGA Breakout and Routing Example #2 - BN256	TN1074	1.0	12/29/2009	ZIP	791.8 KB
BGA Breakout and Routing Example #2 - MN100	TN1074	1.0	12/29/2009	ZIP	719.4 KB
BGA Breakout and Routing Example #2 - MN132	TN1074	1.0	12/29/2009	ZIP	804.3 KB
MachXO 2280 Breakout Board Evaluation Kit - OrCAD Capture Schematic Source Design Entry (.dsn) format schematics for the MachXO 2280 Breakout Board.		1.0	3/21/2011	DSN	474.5 KB
MachXO 2280 Breakout Board PCB Artwork PCB Design (.brd) format PCB artwork and PDF for the MachXO 2280 Breakout board.		1.0	3/21/2011	ZIP	3.5 MB
POWR1014A Breakout Board OrCAD Schematic Source Design Entry (.dsn) format schematics for the POWR1014A Breakout Board.		1.0	3/21/2011	DSN	302 KB
POWR1014A Breakout Board PCB Artwork PCB Design (.brd) format PCB artwork and PDF for the POWR1014A Breakout board.		1.0	3/21/2011	ZIP	3.6 MB