The ispClock Evaluation Board allows the designer to quickly configure and evaluate the ispClock5620 on a fully assembled printed-circuit board. The board features an ispPAC-CLK5620V-01T100C (20 outputs, 100-pin TQFP package), a header for user I/O, SMA connectors to selected high-speed I/O signals, LEDs for status indication, switches for added flexibility, and a JTAG interface for programming.
Device Support
You will need the PAC-Designer software (version 3.0 or later) to use this board. PAC-Designer can be downloaded from the Lattice web site.
