LatticeECP3 Serial Protocol Evaluation Board

The LatticeECP3 Serial Protocol Evaluation Board allows designers to investigate and experiment with the features of the LatticeECP3 high-speed SERDES transceivers. It is available for full and detailed characterization of the high speed I/O channels and includes interfaces for some of the latest protocol interconnections.

Features

  • PCI Express x4 edge connector interfaces
    • Allow demonstration of PCI Express (x4) interfaces
    • This board is larger than the standard PCIe form-factor, but will demonstrate PCIe x4 functionality with an open-frame motherboard
  • Allow control of SERDES PCS registers using the Serial Client Interface (ORCAstra)
  • Serial ATA interfaces for host and target configurations
  • RJ45 interface to 10/100/1000 Ethernet
  • On-board Boot Flash.
    • 64M Serial SPI Flash
    • Parallel Flash via MachXO™ Crossover PLD programming bridge
  • Switches, LEDs, displays for demo purposes
  • Several debug and analysis connections
  • Input connection for lab-power supply
  • Power connections and power sources
  • ispVM™ programming support
  • On-board and external reference clock sources

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Ordering Information

  • This product is no longer available for purchase. The information provided here is for reference only
  • Reference number: LFE3-95EA-SP-EVN

Documentation

Quick Reference
Information Resources
Downloads
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Parallel Flash Programming and FPGA Configuration - Source Code
For use with Application Note - AN8077
AN80771.31/4/2013RAR1.4 MB
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Parallel Flash Programming and FPGA Configuration - Source Code
For use with Application Note - AN8077
AN80771.31/4/2013RAR1.4 MB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.

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LatticeECP3 Serial Protocol Board - Revision D User's Guide
EB441.37/8/2010PDF2.4 MB
LatticeECP3 Serial Protocol Board - Revision E User's Guide
EB491.411/27/2012PDF5.1 MB
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Lattice HetNet Solutions Brochure
I02341.011/12/2013PDF2.2 MB
LatticeECP3: First PCIe 2.0 Compliant Low Cost FPGA - News Brief
NB1047/1/2011PDF479.5 KB
Wireless Solutions Brochure
I01973.08/14/2012PDF2 MB
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GEN2 Serial RapidIO and Low Cost, Low Power FPGAs
1.08/4/2011PDF276 KB
Implementing PCI Express Bridging Solutions in an FPGA
1.07/1/2010PDF970.1 KB
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ECP3 Serial Protocol Board (SPB) Default Programming Files - GL051
1.011/24/2009ZIP289.1 KB

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