LatticeECP2/M FPGAファミリ

低コストFPGA

Related Products

FPGAアプリケーション空間の再定義－LatticeECP2とLatticeECP2Mファミリは、最大95KのLUTと最大5.3 MビットのブロックRAMと分散RAMを備えており、以前は高コストのFPGAにしかなかった機能を搭載しています

PCSを使用した高速SERDES－PCI Express、イーサネット (1 GbEおよびSGMII)、OBSAIおよびCPRIを含む一般的なデータプロトコルのアレイに対応するように、ジッター耐性の高い、PCSブロック付き低伝送SERDESを構成できます

電力消費のないパフォーマンス－LatticeECP2/Mファミリが最大840MbpsのLVDS I/O、DDR1/2(533 Mbps)、SPI4.2(750)に対応できないと考えるかもしれませんが、可能です

特長

  • エンベデッドSERDESは最大3.125 Gbpsのデータレートに対応します（LatticeECP2のみ）
  • 高性能の乗算および累算を可能とする最大42個のsysDSP™ブロック
  • 55Kビットから5308KビットsysMEM™エンベデッドブロックRAM（EBR）
  • sysCLOCKアナログPLLおよびDLLにより、クロック乗算、分割、位相&遅延の調整が可能
  • TQFP, PQFPおよびfpBGAパッケージ

リンクに飛ぶ

ファミリーテーブル

LatticeECP2セレクションガイド (“S” シリーズを含む)

デバイス ECP2-6 ECP2-12 ECP2-20 ECP2-35 ECP2-50 ECP2-70
LUT数 6 12 21 32 48 68
分散RAM容量 (Kbit) 12 24 42 64 96 136
EBR SRAM容量 (Kbit) 55 221 276 332 387 1032
EBR SRAMブロック数 3 12 15 18 21 56
sysDSPブロック数 3 6 7 8 18 22
18x18乗算器 12 24 28 32 72 88
DLL + PLL 2+2 2+2 2+2 2+2 2+4 2+6
最大ユーザI/O数 190 297 402 450 500 583
パッケージ (I/O数)
144ピン TQFP (20 x 20 mm) 90 93
208ピン PQFP (28 x 28 mm) 131 131
256ボールfpBGA (17 x 17 mm) 190 193 193
484ボールfpBGA (23 x 23 mm) 297 331 331 339
672ボールfpBGA (27 x 27 mm) 402 450 500 500
900ボールfpBGA (31 x 31 mm) 583

LatticeECP2Mセレクションガイド (“S” シリーズを含む)

デバイス ECP2M-20 ECP2M-35 ECP2M-50 ECP2M-70 ECP2M-100
LUT数 19 34 48 67 95
EBR SRAMブロック数 66 114 225 246 288
EBR SRAM容量 (Kbit) 1217 2101 4147 4534 5308
分散RAM容量 (Kbit) 41 71 101 145 202
sysDSPブロック数 6 8 22 24 42
18x18乗算器 24 32 88 96 168
GPLL + SPLL + DLL 2+6+2 2+6+2 2+6+2 2+6+2 2+6+2
最大I/O数 304 410 410 436 520
最大I/O数 SERDES CH数 / IOポート数)
256ボールfpBGA (17 x 17 mm) 4 / 140 4 / 140
484ボール fpBGA (23 x 23 mm) 4 / 304 4 / 303 4 / 270
672ボール fpBGA (27 x 27 mm) 4 / 410 8 / 372
900ボール fpBGA (31 x 31 mm) 8 / 410 16 / 416 16 / 416
1152ボール fpBGA (35 x 35 mm) 16 / 436 16 /520

デザインリソース

IP＆リファレンスデザイン

プレテスト、再利用可能な機能を利用して設計の労力を軽減

ソフトウェア

使いやすい設計フローの完全版

開発キット＆ボード

当社の開発キットとボードで設計プロセスの合理化

プログラミング　ハードウェア

当社のプログラミングハードウェアでインシステム・プログラミング、インサーキット再構成の負担を軽減

ドキュメント

Quick Reference
Technical Resources
Information Resources
Downloads
TITLENUMBERVERSIONDATEFORMATSIZE
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Advanced Security Encryption Key Programming Guide for ECP Device Family
FPGA-TN-022021.87/22/2024PDF2.2 MB
Electrical Recommendations for Lattice SERDES
FPGA-TN-020773.312/16/2025PDF1.2 MB
High-Speed PCB Design Considerations
FPGA-TN-021786.48/21/2024PDF3.5 MB
Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.		FPGA-SC-020059.16/26/2026ZIP3.3 MB
LatticeECP2/M Density Migration (Implementation Files)
For use with Technical Note - "TN1160 - LatticeECP2/M Density Migration Technical Note"		TN11609/1/2007ZIP21.5 KB
LatticeECP2/M Density Migration Technical Note
Also download the implementation files for TN1160.		TN11601.08/1/2007PDF122.4 KB
LatticeECP2/M Family Data Sheet
FPGA-DS-021014.38/17/2021PDF26.5 MB
LatticeECP2/M Family Data Sheet (Japanese Language Version)
DS100603.91/30/2011PDF6.8 MB
LatticeECP2/M Hardware Checklist Technical Note
TN11621.210/7/2013PDF431.9 KB
LatticeECP2/M High-Speed I/O Interface
TN11051.910/7/2013PDF4.6 MB
LatticeECP2/M Memory Usage Guide
TN11042.110/7/2013PDF4.1 MB
LatticeECP2/M Pin Assignment Recommendations
TN11591.18/18/2009PDF69.9 KB
LatticeECP2/M S-Series Configuration Encryption Usage Guide
TN11091.610/7/2013PDF1.5 MB
LatticeECP2/M Soft Error Detection (SED) Usage Guide
TN11132.210/7/2013PDF1012.3 KB
LatticeECP2/M sysCLOCK PLL/DLL Design and Usage Guide
TN11032.210/7/2013PDF4.6 MB
LatticeECP2/M sysCONFIG Usage Guide
TN11082.510/7/2013PDF2.7 MB
LatticeECP2/M sysDSP Usage Guide
TN11071.410/7/2013PDF3 MB
LatticeECP2/M sysIO Usage Guide
TN11022.010/7/2013PDF2.2 MB
LatticeECP2M Broadcom XAUI 10 Gbps Physical Layer Interoperability Over CX-4
TN118801.011/2/2009PDF565.7 KB
LatticeECP2M Marvell XAUI 10 Gbps Physical Layer Interoperability
TN11911.011/18/2008PDF434.4 KB
LatticeECP2M PRBS SERDES Demo User's Guide
TN115301.56/28/2010PDF730.8 KB
LatticeECP2M SERDES/PCS Usage Guide
FPGA-TN-022543.77/20/2021PDF7.5 MB
LatticeECP2M/Marvell Gigabit Ethernet Physical Layer Interoperability Technical Note
TN116301.07/1/2007PDF1.2 MB
LatticeECP2M/Marvell Serial-GMII (SGMII) Physical Layer Interoperability
TN113301.12/13/2012PDF3.5 MB
LatticeECP3 and LatticeECP2M High-Speed Backplane Measurements
TN11491.510/7/2013PDF3.8 MB
LatticeECP3, LatticeECP2/M, ECP5 and ECP5-5G Dual Boot and Multiple Boot Feature
FPGA-TN-022031.810/26/2021PDF1.3 MB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-021984.612/11/2025PDF1.6 MB
Package Diagrams
FPGA-DS-020538.87/14/2026PDF9.6 MB
Parallel Flash Programming and FPGA Configuration - Source Code
For use with Application Note - AN8077		AN80771.31/4/2013RAR1.4 MB
PCI Express SIG Compliance Overview for Lattice Semiconductor FPGAs
TN116601.08/1/2007PDF759.5 KB
Power Estimation and Management for LatticeECP2/M Devices Technical Note
TN11061.510/7/2013PDF491.1 KB
Thermal Management
FPGA-TN-020446.08/19/2026PDF976.2 KB
Transmission of High-Speed Serial Signals over Common Cable Media
FPGA-TN-021961.98/6/2023PDF1.8 MB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.

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LatticeECP2/M Family Data Sheet
FPGA-DS-021014.38/17/2021PDF26.5 MB
LatticeECP2/M Family Data Sheet (Japanese Language Version)
DS100603.91/30/2011PDF6.8 MB
TITLENUMBERVERSIONDATEFORMATSIZE
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Advanced Security Encryption Key Programming Guide for ECP Device Family
FPGA-TN-022021.87/22/2024PDF2.2 MB
Electrical Recommendations for Lattice SERDES
FPGA-TN-020773.312/16/2025PDF1.2 MB
Electrical Recommendations for Lattice SERDES (Chinese Language Version)
TN1114C02.810/12/2012PDF2 MB
High-Speed PCB Design Considerations
FPGA-TN-021786.48/21/2024PDF3.5 MB
High-Speed PCB Design Considerations (Chinese Language Version)
TN1033C06.15/23/2011PDF434.6 KB
LatticeECP2/M Density Migration (Implementation Files)
For use with Technical Note - "TN1160 - LatticeECP2/M Density Migration Technical Note"		TN11609/1/2007ZIP21.5 KB
LatticeECP2/M Density Migration Technical Note
Also download the implementation files for TN1160.		TN11601.08/1/2007PDF122.4 KB
LatticeECP2/M Hardware Checklist Technical Note
TN11621.210/7/2013PDF431.9 KB
LatticeECP2/M High-Speed I/O Interface
TN11051.910/7/2013PDF4.6 MB
LatticeECP2/M High-Speed I/O Interface (Japanese Language Version)
TN110501.51/18/2009PDF1.6 MB
LatticeECP2/M Memory Usage Guide
TN11042.110/7/2013PDF4.1 MB
LatticeECP2/M Memory Usage Guide Technical Note (Japanese Language Version)
TN110401.81/15/2009PDF1.5 MB
LatticeECP2/M Pin Assignment Recommendations
TN11591.18/18/2009PDF69.9 KB
LatticeECP2/M S-Series Configuration Encryption Usage Guide
TN11091.610/7/2013PDF1.5 MB
LatticeECP2/M S-Series Configuration Encryption Usage Guide (Japanese Language Version)
TN110901.22/18/2009PDF391.1 KB
LatticeECP2/M Soft Error Detection (SED) Usage Guide
TN11132.210/7/2013PDF1012.3 KB
LatticeECP2/M sysCLOCK PLL/DLL Design and Usage Guide
TN11032.210/7/2013PDF4.6 MB
LatticeECP2/M sysCLOCK PLL/DLL Design and Usage Guide (Japanese Language Version)
TN110301.61/19/2009PDF1.4 MB
LatticeECP2/M sysCONFIG Usage Guide
TN11082.510/7/2013PDF2.7 MB
LatticeECP2/M sysCONFIG Usage Guide (Japanese Language Version)
TN110802.11/15/2009PDF652.1 KB
LatticeECP2/M sysDSP Usage Guide
TN11071.410/7/2013PDF3 MB
LatticeECP2/M sysDSP Usage Guide (Japanese Language Version)
TN110701.19/1/2006PDF1 MB
LatticeECP2/M sysIO Usage Guide
TN11022.010/7/2013PDF2.2 MB
LatticeECP2/M sysIO Usage Guide (Chinese Language Version)
TN1102C01.74/28/2010PDF341.1 KB
LatticeECP2/M sysIO Usage Guide (Japanese Language Version)
TN110201.61/19/2009PDF586.4 KB
LatticeECP2M Broadcom XAUI 10 Gbps Physical Layer Interoperability Over CX-4
TN118801.011/2/2009PDF565.7 KB
LatticeECP2M Marvell XAUI 10 Gbps Physical Layer Interoperability
TN11911.011/18/2008PDF434.4 KB
LatticeECP2M PRBS SERDES Demo User's Guide
TN115301.56/28/2010PDF730.8 KB
LatticeECP2M SERDES/PCS Usage Guide
FPGA-TN-022543.77/20/2021PDF7.5 MB
LatticeECP2M SERDES/PCS Usage Guide (Japanese)
TN112402.92/2/2009PDF2.5 MB
LatticeECP2M/Marvell Gigabit Ethernet Physical Layer Interoperability Technical Note
TN116301.07/1/2007PDF1.2 MB
LatticeECP2M/Marvell Serial-GMII (SGMII) Physical Layer Interoperability
TN113301.12/13/2012PDF3.5 MB
LatticeECP3 and LatticeECP2M High-Speed Backplane Measurements
TN11491.510/7/2013PDF3.8 MB
LatticeECP3, LatticeECP2/M, ECP5 and ECP5-5G Dual Boot and Multiple Boot Feature
FPGA-TN-022031.810/26/2021PDF1.3 MB
Migrating Designs from AMD CPLD/FPGA Devices to Lattice FPGA Devices
FPGA-AN-020811.27/15/2026PDF2.8 MB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-021984.612/11/2025PDF1.6 MB
Parallel Flash Programming and FPGA Configuration - Source Code
For use with Application Note - AN8077		AN80771.31/4/2013RAR1.4 MB
PCI Express SIG Compliance Overview for Lattice Semiconductor FPGAs
TN116601.08/1/2007PDF759.5 KB
Power Estimation and Management for LatticeECP2/M Devices Technical Note
TN11061.510/7/2013PDF491.1 KB
Thermal Management
FPGA-TN-020446.08/19/2026PDF976.2 KB
Transmission of High-Speed Serial Signals over Common Cable Media
FPGA-TN-021961.98/6/2023PDF1.8 MB
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Package Diagrams
FPGA-DS-020538.87/14/2026PDF9.6 MB
TITLENUMBERVERSIONDATEFORMATSIZE
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Lattice PCI Express x4 Scatter-Gather DMA Demo Verilog Source Code User's Guide
UG0601.312/14/2010PDF144.3 KB
Lattice SMPTE SDI Demo User's Guide
Explains how to use the SMPTE SDI Demo - available for download separately, along with the LatticeECP2M SMPTE SDI Evaluation Board and the Multi-Rate Serial Digital Interface (SDI) PHY Layer IP core.		UG0201.17/11/2008PDF1.4 MB
LatticeECP2 Advanced Evaluation Board User's Guide
Describes the features and functions of the LatticeECP2-Advanced Evaluation Board. Includes schematics.		EB2301.61/13/2009PDF2 MB
LatticeECP2 Standard Evaluation Board User's Guide
Describes the features and functions of the LatticeECP2 Standard Evaluation Board, including schematics.		5/1/2007PDF1.2 MB
LatticeECP2M PCI Express Solutions Evaluation Board User's Guide
Describes the features and operation of the LatticeECP2M PCIe solutions board - includes schematics. This board is included with the LatticeECP2M PCI Express Development Kit.		EB3301.09/4/2008PDF2.4 MB
LatticeECP2M PCI Express x4 Evaluation Board User's Guide - Rev A PCB
Describes the features and functions of the LatticeECP2M PCI Express x4 Evaluation Board, including schematics.This manual is for Rev A boards only. 		EB2201.62/8/2008PDF1.1 MB
LatticeECP2M PCI Express x4 Evaluation Board User's Guide - Rev B PCB
Describes the features and functions of the LatticeECP2M PCI Express x4 Evaluation Board, including schematics. This manual is for Rev B boards only.		EB3401.21/13/2009PDF1.2 MB
LatticeECP2M SERDES Evaluation Board User's Guide
Describes the features and functions of the LatticeECP2M SERDES Evaluation Board. Includes schematics.		EB2501.75/7/2010PDF1.4 MB
PCI Express Basic Demo Verilog Source Code User's Guide
UG1501.312/14/2010PDF132 KB
PCI Express Throughput Demo Verilog Source Code User's Guide
UG0701.412/14/2010PDF139.6 KB
PCI IP Core User's Guide
PCI Core User Guide for LatticeSC, LatticeECP3, LatticeECP2/M, LatticeECP/EC, LatticeXP, Mach XO, and MachXO2		IPUG189.211/8/2010PDF4.6 MB
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IrDA Fast Transmitter - Source Code
RD11351.010/12/2012ZIP414.4 KB
RGMII to GMII Bridge - Source Code
7/15/2025ZIP382.7 KB
RGMII to GMII Bridge Reference Design - User Guide
FPGA-RD-021362.67/15/2025PDF257.7 KB
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ACN03D-11 Withdrawal of ACN03C-11
Material Set		ANC03D-1114/1/2011PDF796.6 KB
Courtesy Notification of Additional Ejector Pin Sites on Select BGA Packages
5/22/2013PDF252.9 KB
PCN 02A-15 Affected_OPN_Listing
Discontinuance		3.08/12/2015XLSX310.4 KB
PCN 02A-15 SnPb and Select Mature Family Discontinuance
1.06/18/2015PDF316.9 KB
PCN 03C13 Alternate Qualified Assembly Test Site Alternate Qualified Material Sets ASE Taiwan
Assembly Site, Material Set		PCN03C1.011/14/2014PDF212.8 KB
PCN 09A-12 Affected Devices
Assembly Site		PCN09A-121.05/14/2012XLSX121 KB
PCN 09A-12 Alternate Qualified Material Set, Assembly Site for Select Lattice Families
PCN09A-121.05/14/2012PDF160.2 KB
PCN 09A-12 Frequently Asked Questions
PCN09A-121.05/11/2012PDF178.9 KB
PCN 09A-12 Material Set Changes
Assembly Site		PCN09A-121.05/14/2012XLSX121 KB
PCN02A-15 Frequently Asked Questions
2.06/18/2015DOCX60.8 KB
PCN02B-12 Notification of a Revision to the LatticeXP2, LA-LatticeXP2 and LatticeECP2/M Data Sheets
Data Sheet		PCN02B-121.02/6/2012PDF181.6 KB
PCN03A-13 Alternate Qualified Assembly and Material Sets for Select Devices
PCN03A-136/28/2013PDF202.5 KB
PCN03A-13 Device Characterization Report
PCN03A-136/28/2013PDF981.3 KB
PCN03A-13 FAQs
PCN03A-136/28/2013PDF458.3 KB
PCN03A-14 Characterization Report
PCN03A-141.04/4/2014PDF919.5 KB
PCN03A-14 FAQ
PCN03A-141.04/4/2014PDF452.5 KB
PCN03A-14 Material Set Table
PCN03A-141.04/4/2014XLSX26.9 KB
PCN03B-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and/or Alternate Qualified Material Sets for Select Lattice Products
PCN03B-141.011/21/2014PDF229.9 KB
PCN03C-13 Affected Part Number and Material Sets
PCN03C-136/28/2013XLSX51.2 KB
PCN03C-14 Affected Part Number List
PCN03C-141.04/4/2014XLSX50.8 KB
PCN05A-17 Affected Parts List
1.010/18/2017XLSX14.9 KB
PCN05A-17 Halogen-Free substrate at ASEM
1.210/27/2017PDF268 KB
PCN06A-14 Characterization Report
PCN06A-141.010/3/2014PDF563.7 KB
PCN06A-14 Material Set Table
PCN06A-141.010/3/2014XLSX13.7 KB
PCN06B-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and Alternate Qualified Material Sets for Select Lattice Products
PCN06B-141.011/21/2014PDF229.5 KB
PCN06C-11 Withdrawal of PCN06B-11
Material Set		PCN06C-111.08/1/2011PDF838.5 KB
PCN06C-14 Affected Device List
PCN06C-141.010/3/2014XLSX29.6 KB
PCN07C-11 Withdrawal of PCN07B-11
Material Set		PCN07C-111.08/1/2011PDF917.9 KB
PCN08A13_AffectedDevices
Other		PCN08A-1319/26/2013XLSX78.2 KB
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Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.		FPGA-SC-020059.16/26/2026ZIP3.3 MB
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Lattice HetNet Solutions Brochure
I02341.011/12/2013PDF2.2 MB
LatticeECP2/M Product Briefs
I01877.012/26/2012PDF2.4 MB
Wireless Solutions Brochure
I01973.08/14/2012PDF2 MB
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FN1152_FE2
Rev K16/8/2022PDF141.5 KB
FN256_FE2
Rev K16/8/2022PDF33.8 KB
FN484
Rev K16/8/2022PDF30.4 KB
FN672
Rev L16/8/2022PDF154.1 KB
FN900_FE2
Rev K16/8/2022PDF153.9 KB
QN_YN208
Rev E112/21/2021PDF21.9 KB
TN_TG_TQ144 Cu_wire all
Rev E112/21/2021PDF107.1 KB
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Expanding Applications For Low Cost FPGAs
8/1/2007PDF295 KB
FPGA Design Security Issues: Using Lattice FPGAs to Achieve High Design Security
9/1/2007PDF259.2 KB
Gen2 Serial RapidIO and Low Cost Low Power FPGAs (Korean Language)
1.09/26/2011PDF349 KB
Implementing PCI Express Bridging Solutions in an FPGA
1.07/1/2010PDF970.1 KB
Implementing PCI Express Bridging Solutions in an FPGA (Chinese Language)
1.07/1/2010PDF1007.1 KB
Interfacing Analog to Digital Converters to FPGAs
1.011/7/2007PDF202.3 KB
Low Cost Serial Transmission with the LatticeECP2M FPGA
7/1/2007PDF250.4 KB
The Challenges of Automotive Vision Systems Design
4/1/2007PDF341.5 KB
The FPGA as a Flexible and Low-Cost Digital Solution for Wireless Base Stations
3/1/2007PDF384.9 KB
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[BSDL] LFE2M100E FPBGA1152
1.039/10/2012BSM129.2 KB
[BSDL] LFE2M100E FPBGA900
1.039/10/2012BSM115.9 KB
[BSDL] LFE2M20E FPBGA256
1.039/10/2012BSM52.1 KB
[BSDL] LFE2M20E FPBGA484
1.039/10/2012BSM68.6 KB
[BSDL] LFE2M35E FPBGA256
1.029/10/2012BSM60.9 KB
[BSDL] LFE2M35E FPBGA484
1.039/10/2012BSM77.8 KB
[BSDL] LFE2M35E FPBGA672
1.031/26/2016BSM89.5 KB
[BSDL] LFE2M50E FPBGA484
1.039/10/2012BSM80.6 KB
[BSDL] LFE2M50E FPBGA672
1.039/10/2012BSM93.9 KB
[BSDL] LFE2M50E FPBGA900
1.039/10/2012BSM102.5 KB
[BSDL] LFE2M70E FPBGA1152
1.039/10/2012BSM113.9 KB
[BSDL] LFE2M70E FPBGA900
1.039/10/2012BSM105.6 KB
[BSDL] LFEC2_12E FPBGA256
1.039/10/2012BSM52 KB
[BSDL] LFEC2_12E FPBGA484
1.039/10/2012BSM64.5 KB
[BSDL] LFEC2_12E PQFP208
1.019/10/2012BSM46.6 KB
[BSDL] LFEC2_12E TQFP144
1.019/10/2012BSM42.2 KB
[BSDL] LFEC2_20E FPBGA256
1.019/10/2012BSM58 KB
[BSDL] LFEC2_20E FPBGA484
1.019/10/2012BSM72.6 KB
[BSDL] LFEC2_20E FPBGA672
1.019/10/2012BSM82.1 KB
[BSDL] LFEC2_20E PQFP208
1.019/10/2012BSM52.9 KB
[BSDL] LFEC2_35E FPBGA484
1.019/10/2012BSM79.2 KB
[BSDL] LFEC2_35E FPBGA672
1.019/10/2012BSM91.5 KB
[BSDL] LFEC2_50E FPBGA484
1.059/10/2012BSM88.2 KB
[BSDL] LFEC2_50E FPBGA672
1.079/10/2012BSM103.5 KB
[BSDL] LFEC2_6E FPBGA256
1.019/10/2012BSM43.7 KB
[BSDL] LFEC2_6E TQFP144
1.019/10/2012BSM34.5 KB
[BSDL] LFEC2_70E FPBGA672
1.029/10/2012BSM111.2 KB
[BSDL] LFEC2_70E FPBGA900
1.029/10/2012BSM122.7 KB
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ECP2/M Device Family DELPHI Models
1.04/9/2009ZIP501.6 KB
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[IBIS] Lattice ECP2
2.27/1/2008IBS33.4 MB
[IBIS] Lattice ECP2M
2.27/1/2008IBS33.4 MB
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Lattice SMPTE SDI Demo Code
This contains all the design files and standard, configured IP block for use with the LatticeECP2M SMPTE SDI Evaluation Board and the Multi-Rate Serial Digital Interface (SDI) PHY Layer IP core. See the User's Guide (available for download separately)		1.17/11/2008ZIP777.1 KB
LatticeECP2 Standard Evaluation Board Sample Program
Contains a sample program for the LatticeECP2 Standard Evaluation Board. This program is pre-loaded onto new LatticeECP2 Standard boards. See the readme.txt file for details.		5/1/2006ZIP37.3 KB
LatticeECP2M PRBS SERDES Demo
This demo illustrates the SERDES/PCS capabilities of the LatticeECP2M by embedding a simple pseudo-random pattern into an 8b10b encoded PCS payload, then looping back the payload, and checking it for correctness.		3/8/2010ZIP706.6 KB

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