Certus-N2

高性能通用小型FPGA

莱迪思Certus-N2系列小型通用FPGA提供高达220k的系统逻辑单元和8-16G的多协议SerDes,并提供小型封装选项。该系列器件采用莱迪思Nexus 2平台构建。与同类竞品相比,低功耗优势更为显著,还支持同类产品中业界领先的设计安全性。

更高的性能——逻辑密度、串行总线速度和DSP逻辑比均是上一代产品的2倍

支持高速外部存储器——LPDDR4/DDR4速度高达2400 Mbps

低功耗—— 功耗比同类竞品最多低3倍

特性

  • 多达8个SerDes通道,总带宽高达128 Gbps
  • 带SerDes的封装尺寸小至9x9 mm2,球间距可选0.5、0.8和1.0 mm
  • 拥有多达220k系统逻辑单元、12 Mb嵌入式存储器和520个18 x 18乘法器
  • 瞬时启动:使用xSPI闪存配置时间< 20 ms
  • 业界领先的位流加密和验证

Jump to

产品系列表

Certus-N2器件选型指南
特性 CT06 CT10 CT16 CT20
系统逻辑单元(K) 65 100 160 220
查找表(K LUT) 40 61 98 135
嵌入式存储(EBR)块(36 kb) 114 153 228 306
嵌入式存储(Mb) 4 5.5 8 12
分布式RAM位(kb) 416 636 1041 1272
DSP(18x18乘法器) 120 240 360 520
高频振荡器(400 MHz) 1 1 1 1
GPLL 4 4 7 7
支持的外部存储器接口 LPDDR4/DDR4
最大16G SerDes通道数量 4 4 8 8
温度等级1 C, I C, I C, I C, I
位流加密和验证 AES-GCM / ECDSA / RSA
0.5 mm I/O总数(宽范围/高性能)/SerDes

CT06 CT10 CT16 CT20
ASG187 (FOWLP, 6 × 9.5 mm, 0.5 mm)2 87 (27,60) 87 (27,60)
ASG273 (FOWLP, 9 × 9 mm, 0.5 mm)2 112 (27, 85) / 4 112 (27, 85) / 4
ASG410 (FOWLP, 11 × 9 mm, 0.5 mm)2 247 (94,153) 247 (94,153)
ASG410 (FOWLP, 11 × 9 mm, 0.5 mm)2 196 (43, 153) / 4 196 (43, 153) / 4
0.8 mm I/O总数(宽范围/高性能)/SerDes

CT06 CT10 CT16 CT20
CBG256 (FCCSP , 14 × 14 mm, 0.8 mm) 153 (51, 102) / 2 153 (51, 102) / 2
CBG484 (FCCSP, 18 × 18 mm, 0.8 mm) 196 (94, 102) / 4 196 (94, 102) / 4 247(94,153) / 4 247(94,153) / 4
1.0 mm I/O总数(宽范围/高性能)/SerDes

CT06 CT10 CT16 CT20
LFG672 (FCBGA, 27 × 27 mm, 1.0 mm) 349 (94, 255) / 8 349 (94, 255) / 8

1. C=商用, I=工业

示例解决方案

工业机器视觉

  • 传感器接口——MIPI CSI-2、LVDS、SubLVDS
  • 用于图像处理的可定制ISP
  • 高带宽10GbE连接,可流式传输无损质量视频

汽车分区控制器/网关

  • 接口桥接和低延迟交换
  • 灵活的以太网、传感器/执行器端口配置
  • 可选图像数据压缩,优化带宽并降低延迟

帧抓取器

  • 通过PCIe将图像采集、预处理、压缩(可选)和DMA传输到主机PC
  • 支持10GbE视频输入和PCIe输出的SerDes
  • 支持LPDDR4外部存储器,用于帧缓冲(可选)

设计资源

开发套件和开发板

我们的开发板和开发套件能够简化您的设计流程

IP和参考设计

使用经过预先测试、可重复使用的功能简化您的设计工作

软件

覆盖整个设计流程,非常易于使用

文档

快速参考
技术资源
资讯资源
下载
标题编号版本日期格式文件大小
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Lattice Nexus 2 Platform - Overview Data Sheet
FPGA-DS-021220.737/9/2026PDF1.3 MB
Lattice Nexus 2 Platform Data Sheet - Specifications
FPGA-DS-021210.727/2/2025PDF1.4 MB
Lattice Nexus 2 Power User Guide
FPGA-TN-023810.8012/10/2024PDF352.4 KB
Lattice Nexus 2 SERDES/PCS User Guide
FPGA-TN-023950.804/15/2025PDF2.3 MB
Lattice Nexus 2 sysCLOCK PLL Design and User Guide
FPGA-TN-023640.8112/10/2024PDF1 MB
Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.
FPGA-SC-020059.16/26/2026ZIP3.3 MB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-021984.612/11/2025PDF1.6 MB
PCB Layout Recommendations for BGA Packages
FPGA-TN-020245.612/10/2024PDF6.2 MB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-020415.35/6/2026PDF753.9 KB
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-020282.612/10/2024PDF560.4 KB
Thermal Management
FPGA-TN-020446.08/19/2026PDF976.2 KB
Using TraceID
FPGA-TN-020842.912/11/2025PDF491.6 KB
标题编号版本日期格式文件大小
选择全部
Lattice Nexus 2 Platform - Overview Data Sheet
FPGA-DS-021220.737/9/2026PDF1.3 MB
Lattice Nexus 2 Platform Data Sheet - Specifications
FPGA-DS-021210.727/2/2025PDF1.4 MB
标题编号版本日期格式文件大小
选择全部
Lattice Nexus 2 Configuration Security User Guide
Access this document via a Technical Support Request after signing in to the Lattice website. Complete the request form via this link, please click here.
FPGA-TN-023690.83/14/2025WEB
Lattice Nexus 2 Device Security User Guide
Access this document via a Technical Support Request after signing in to the Lattice website. Complete the request form via this link, please click here.
FPGA-TN-023680.83/14/2025WEB
Lattice Nexus 2 Embedded Memory User Guide
FPGA-TN-023660.8112/10/2024PDF1.1 MB
Lattice Nexus 2 Hardware Checklist
FPGA-TN-023820.8211/5/2025PDF906.3 KB
Lattice Nexus 2 High-Speed I/O and External Memory Interface User Guide
FPGA-TN-023720.8112/10/2024PDF1.5 MB
Lattice Nexus 2 Multi-Boot User Guide
FPGA-TN-023850.8012/10/2024PDF366.5 KB
Lattice Nexus 2 Power User Guide
FPGA-TN-023810.8012/10/2024PDF352.4 KB
Lattice Nexus 2 SED/SEC User Guide
FPGA-TN-023800.8012/10/2024PDF311.3 KB
Lattice Nexus 2 SERDES/PCS User Guide
FPGA-TN-023950.804/15/2025PDF2.3 MB
Lattice Nexus 2 sysCLOCK PLL Design and User Guide
FPGA-TN-023640.8112/10/2024PDF1 MB
Lattice Nexus 2 sysCONFIG User Guide
FPGA-TN-023700.8112/10/2024PDF3.2 MB
Lattice Nexus 2 sysDSP User Guide
FPGA-TN-023620.823/17/2025PDF814 KB
Lattice Nexus 2 sysI/O User Guide
FPGA-TN-023650.8112/10/2024PDF647.8 KB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-021984.612/11/2025PDF1.6 MB
PCB Layout Recommendations for BGA Packages
FPGA-TN-020245.612/10/2024PDF6.2 MB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-020415.35/6/2026PDF753.9 KB
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-020282.612/10/2024PDF560.4 KB
Thermal Management
FPGA-TN-020446.08/19/2026PDF976.2 KB
Using TraceID
FPGA-TN-020842.912/11/2025PDF491.6 KB
标题编号版本日期格式文件大小
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Certus-N2 CT20 Pinout Table
FPGA-SC-021080.803/26/2026CSV40.9 KB
Lattice Nexus 2 Package Diagram
FPGA-DS-021240.8112/10/2024ZIP105.6 KB
标题编号版本日期格式文件大小
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Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.
FPGA-SC-020059.16/26/2026ZIP3.3 MB
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Random Bin Picking Based On Structured-Light 3D Scanning
WP00432.05/22/2025PDF3.7 MB
莱迪思Nexus™ 2平台:低功耗、高性能、小尺寸FPGA
WP00401.012/10/2024PDF759.9 KB
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Certus-N2 CT20 BSDL Model file
FPGA-MD-020840.812/10/2024ZIP19.1 KB
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Lattice Nexus 2 Delphi Models
FPGA-MD-020750.8112/5/2024ZIP17.5 KB
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[IBIS] Certus-N2
FPGA-MD-020780.811/6/2026ZIP28.7 MB