Power Manager II

为具备前瞻思维的工程师提供集成的电路板功耗管理功能

相关产品


Newsletter Subscription

不费力气的电源控制——采用Power Manager，您可以监控多达12个电源，具有无与伦比的精度和速度，故障响应时间<65 μs，防止电路板上的闪存出错。

降低BOM成本——管理电路板上电源的最简单方式—Power Manager II集成热插拔控制器、电源OR’ing、定序、电压监控、复位发生、微调、裕度等功能。

方便设计——PAC-Designer软件支持Power Manager II产品系列，提供设计方便性，用户可使用基于PC的软件在写入器件前对电源定序和监控电路进行验证。

特性

  • 多达12个差分电压传感器，带有接地层噪声免疫
  • 准确度在1%内的电压微调
  • 可靠的CPLD带有高达48个宏单元，可作为定序和监控信号逻辑
  • 工作电压范围大（3.3 V + 20%至3.3 V -15%）
  • 多达4个高压MOSFET驱动器输出
  • 使用10位ADC通过I2C进行电压测量
  • 多达8个片上DAC，用于裕度和微调

立即跳转到

产品系列表

Power Manager II 应用检索指南
  ProcessorPM POWR607 POWR1014 POWR1014A POWR1220AT8
电路板输入（主）电源管理热插拔
-48V 热插拔   Check Mark      
+12/24V 热插拔   Check Mark Check Mark Check Mark Check Mark
给外部系统供电
-48V 供电   Check Mark      
+12/24V 供电   Check Mark Check Mark Check Mark Check Mark
冗余电源选择
-48V 电源O R'ing   Check Mark      
+12/24V 电源O R'ing   Check Mark Check Mark Check Mark Check Mark
负载（次）电源管理
电源定序   Check Mark Check Mark Check Mark Check Mark
电压监控 Check Mark Check Mark Check Mark Check Mark Check Mark
复位发生 Check Mark Check Mark Check Mark Check Mark Check Mark
看门狗定时器 Check Mark Check Mark Check Mark Check Mark Check Mark
使用ADC的电压测量       Check Mark Check Mark
电源电压微调         Check Mark
电源电压裕度         Check Mark

莱迪思车用（AEC-Q100认证）ispPAC-POWR1014/A器件选型指南

  LA-POWR1014 LA-POWR1014A
模拟输入引脚 10 10
可编程比较器 20 20
每个输入的触发点 368 368
可监测的最低电压 0.7V 0.7V
掉电侦测 75mV 75mV
CPLD宏单元 24 24
输出 14 14
FET驱动器 2 2
ADC分辨率 - 10位
I2C支持 - 是
工作电压 2.8V至3.9V 2.8V至3.9V
封装
 48-Pin TQFP 48-Pin TQFP

解决方案实例

通过准确地监测多达12个电压，避免闪存出错

  • 高精度的模拟故障检测电路与数字控制逻辑（PLD）被集成在单个芯片中
  • 监控多达12个电压准确地监测故障，快速的触发警报和控制电路板的工作。
  • 通过准确地监控所有的处理器电源电压防止闪存出错。在少于16μs的时间对故障做出响应使处理器复位。

重复使用单芯片，可扩展的电源管理解决方案，节省开发时间和精力。

  • 根据系统的大小和电源需求，使用一块芯片可管理4至12个电源，从而实现了可扩展性。
  • 微调电源定序而无需修改电路板，能够可靠的启动电路板
  • 在软件中简单的点击即可模拟不同的故障情况的效果

使用最低成本的MOSFET实现可靠的热插拔，从而降低系统成本

  • 实现可靠，大功率的热插拔控制器，无需使用昂贵的大型MOSFET
  • 减少所需MOSFET的总数 - 使用较小的低成本，传统的MOSFET

通过整合复位发生器、电压监控、看门狗定时器至单个Power Manager器件，降低50％的成本。

  • 用单个Power Manager器件取代多个单功能的集成电路和分立器件 - 显著减少了电路板空间和成本。

用小于16μs的时间快速切换到后备电源，针对掉电的情况准确地做出调整

  • 掉电期间用小的电池保持电源供电
  • 通过快速，精确的电压监控，掉电期间自动切换到备份电源。

设计资源

IP和参考设计

使用经过预先测试、可重复使用的功能简化您的设计工作

应用说明

了解如何最高效地使用我们一系列的FPGA和开发板

软件

覆盖整个设计流程，非常易于使用

开发套件和开发板

我们的开发板和开发套件能够简化您的设计流程

编程硬件

使用我们的编程硬件，轻松完成在系统编程和在线重配置

文档

快速参考
技术资源
资讯资源
下载
标题编号版本日期格式文件大小
选择全部
Controlling and Monitoring Power-One Bricks and SIPs with Lattice Power Manager Devices
AN605601.14/17/2008PDF216.1 KB
Extending the VMON Input Range of Power/Platform Management Devices
FPGA-AN-020312.59/21/2021PDF1.1 MB
Fail-Safe Sequencing During Field Upgrades Source Files
DT60881.26/6/2012ZIP591.5 KB
Fail-Safe Sequencing During Field Upgrades with Platform Manager
AN608801.26/6/2012PDF1.1 MB
High-side Current Sensing Techniques for Power Manager Devices
AN604901.14/17/2008PDF70.9 KB
Implementing Power Supply Sequencers with Power/Platform Management Devices and PAC-Designer LogiBuilder
AN604201.210/7/2011PDF277 KB
Interfacing Power Manager Devices with Modular DC-to-DC Converters
AN604601.14/17/2008PDF494.6 KB
Interfacing the Trim Output of Power Manager II Devices to DC-DC Converters
AN60741.24/7/2015PDF3.1 MB
ispPAC-POWR1014/A Data Sheet
FPGA-DS-020892.311/20/2020PDF4.7 MB
ispPAC-POWR1220AT8 Evaluation Board
AN606501.23/1/2007PDF305.3 KB
ispPAC-POWR1220AT8 I2C Hardware Verification Utility
AN606701.011/21/2005PDF563.7 KB
Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.		FPGA-SC-020059.16/26/2026ZIP3.3 MB
Monitoring and Controlling Negative Power Supplies with Power Manager Devices
AN605102.14/17/2008PDF67.9 KB
Optimizing the Accuracy of ispPAC Power Manager Timers
AN607601.012/12/2007PDF215.9 KB
Powering Up and Programming the ispPAC-POWR1014/A
AN607501.14/11/2011PDF190.4 KB
Powering Up and Programming the ispPAC-POWR1220AT8
AN607301.14/21/2011PDF171.2 KB
Powering Up and Programming the ispPAC-POWR607
AN607801.14/21/2011PDF1.3 MB
Powering Up and Programming the ProcessorPM ispPAC-POWR605
AN608201.14/21/2011PDF1.1 MB
Programmable Comparator Options for ispPAC-POWR1220AT8
AN606901.011/21/2005PDF259.4 KB
Programming the ispPAC-POWR1220AT8 in a JTAG Chain Using the ATDI Pin
AN606801.12/28/2011PDF245.8 KB
Scalable Centralized Power Management Source Files
DT60891.26/6/2012ZIP520.7 KB
Scalable Centralized Power Management with Field Upgrade Support
AN608901.26/6/2012PDF1.1 MB
Simulating Power Supply Sequences for Power Manager Devices Using PAC-Designer LogiBuilder
AN60441.14/17/2008PDF409.4 KB
Stable Operation of DC-DC Converters with Power Manager Closed Loop Trim
AN60771.110/8/2014PDF676.8 KB
Using ispVM System to Program ispPAC Devices
AN606201.05/1/2004PDF709.2 KB
Using PAC-Designer's Power Manager Waveform Editor
AN605401.011/23/2005PDF276.3 KB
Using Power MOSFETs with Power/Platform Management Devices
AN60481.38/29/2017PDF734.6 KB
Using the HVOUT Simulator Utility to Estimate FET Ramp Times
AN607001.011/21/2005PDF540.1 KB
标题编号版本日期格式文件大小
选择全部
ispPAC-POWR1014/A Data Sheet
FPGA-DS-020892.311/20/2020PDF4.7 MB
ispPAC-POWR1220AT8 Data Sheet
FPGA-DS-020512.04/11/2019PDF4.9 MB
ispPAC-POWR607 Data Sheet
DS10112.04/27/2015PDF2.7 MB
ispPAC-POWR6AT6 Data Sheet
DS10161.511/13/2013PDF3.2 MB
LA-ispPAC-POWR1014/A Automotive Family Data Sheet
FPGA-DS-020901.410/26/2020PDF5.6 MB
ProcessorPM - POWR605 Data Sheet
DS10342.04/10/2015PDF2.7 MB
标题编号版本日期格式文件大小
选择全部
Controlling and Monitoring Power-One Bricks and SIPs with Lattice Power Manager Devices
AN605601.14/17/2008PDF216.1 KB
Extending the VMON Input Range of Power/Platform Management Devices
FPGA-AN-020312.59/21/2021PDF1.1 MB
Fail-Safe Sequencing During Field Upgrades Source Files
DT60881.26/6/2012ZIP591.5 KB
Fail-Safe Sequencing During Field Upgrades with Platform Manager
AN608801.26/6/2012PDF1.1 MB
High-side Current Sensing Techniques for Power Manager Devices
AN604901.14/17/2008PDF70.9 KB
Implementing Power Supply Sequencers with Power/Platform Management Devices and PAC-Designer LogiBuilder
AN604201.210/7/2011PDF277 KB
Interfacing Power Manager Devices with Modular DC-to-DC Converters
AN604601.14/17/2008PDF494.6 KB
Interfacing the Trim Output of Power Manager II Devices to DC-DC Converters
AN60741.24/7/2015PDF3.1 MB
ispPAC-POWR1220AT8 Evaluation Board
AN606501.23/1/2007PDF305.3 KB
ispPAC-POWR1220AT8 I2C Hardware Verification Utility
AN606701.011/21/2005PDF563.7 KB
Monitoring and Controlling Negative Power Supplies with Power Manager Devices
AN605102.14/17/2008PDF67.9 KB
Optimizing the Accuracy of ispPAC Power Manager Timers
AN607601.012/12/2007PDF215.9 KB
Powering Up and Programming the ispPAC-POWR1014/A
AN607501.14/11/2011PDF190.4 KB
Powering Up and Programming the ispPAC-POWR1220AT8
AN607301.14/21/2011PDF171.2 KB
Powering Up and Programming the ispPAC-POWR607
AN607801.14/21/2011PDF1.3 MB
Powering Up and Programming the ProcessorPM ispPAC-POWR605
AN608201.14/21/2011PDF1.1 MB
Programmable Comparator Options for ispPAC-POWR1220AT8
AN606901.011/21/2005PDF259.4 KB
Programming the ispPAC-POWR1220AT8 in a JTAG Chain Using the ATDI Pin
AN606801.12/28/2011PDF245.8 KB
Scalable Centralized Power Management Source Files
DT60891.26/6/2012ZIP520.7 KB
Scalable Centralized Power Management with Field Upgrade Support
AN608901.26/6/2012PDF1.1 MB
Simulating Power Supply Sequences for Power Manager Devices Using PAC-Designer LogiBuilder
AN60441.14/17/2008PDF409.4 KB
Stable Operation of DC-DC Converters with Power Manager Closed Loop Trim
AN60771.110/8/2014PDF676.8 KB
Using ispVM System to Program ispPAC Devices
AN606201.05/1/2004PDF709.2 KB
Using PAC-Designer's Power Manager Waveform Editor
AN605401.011/23/2005PDF276.3 KB
Using Power MOSFETs with Power/Platform Management Devices
AN60481.38/29/2017PDF734.6 KB
Using the ABEL Tools of PAC-Designer with Power Manager Devices
AN605202.05/1/2003PDF777 KB
Using the HVOUT Simulator Utility to Estimate FET Ramp Times
AN607001.011/21/2005PDF540.1 KB
标题编号版本日期格式文件大小
选择全部
ispPAC-POWR607 Evaluation Board User's Guide
Describes the features and functions of the ispPAC-POWR607 Evaluation Board		5/23/2007PDF1.2 MB
标题编号版本日期格式文件大小
选择全部
12V Hot Swap Control - Documentation
RD10681.04/26/2010PDF469.8 KB
12V Hot Swap Control - Source Code
RD10681.04/26/2010ZIP371.1 KB
5V and 3.3V Hot Swap Controller - Documentation
RD10571.08/4/2009PDF185.3 KB
5V and 3.3V Hot Swap Controller - Source Code
RD10571.08/6/2009ZIP135 KB
AMC Module Power Management - Documentation
RD10701.04/26/2010PDF532.3 KB
AMC Module Power Management - Source Code
RD10701.04/26/2010ZIP468.3 KB
Hercules Development Kit Demonstration Source Code
1.06/11/2010ZIP201.6 KB
OrCAD Capture (.dsn) format schematics
19/28/2010ZIP0.7 KB
Redundant Power Supply Management
RD10641.04/26/2010PDF508.9 KB
Redundant Power Supply Management - Source Code
RD10641.04/26/2010ZIP441.3 KB
Supervisor, WDT and Reset Generation with ProcessorPM - Documentation
RD10561.08/17/2009PDF815.7 KB
Supervisor, WDT and Reset Generation with ProcessorPM - Source Code
RD10561.08/3/2009ZIP744.4 KB
Voltage Monitoring for Fault Logging - Documentation
RD10721.04/26/2010PDF447.5 KB
Voltage Monitoring for Fault Logging - Source Code
RD10721.04/26/2010ZIP327.3 KB
标题编号版本日期格式文件大小
选择全部
ACN03D-11 Withdrawal of ACN03C-11
Material Set		ANC03D-1114/1/2011PDF796.6 KB
PCN06C-11 Withdrawal of PCN06B-11
Material Set		PCN06C-111.08/1/2011PDF838.5 KB
PCN07B-19 Unisem Shutdown
PCN07B-1911/26/2019PDF348.2 KB
PCN13A-10 Notification of intent to discontinue select mature devices
PCN13A-1019/7/2010PDF163.7 KB
PCN13A-10 Notification of intent to discontinue select mature devices - Japanese Language
PCN13A-1019/7/2010PDF205.1 KB
标题编号版本日期格式文件大小
选择全部
Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.		FPGA-SC-020059.16/26/2026ZIP3.3 MB
标题编号版本日期格式文件大小
选择全部
Automotive Solutions Product Brief (Chinese)
I0164hc8.08/7/2013PDF2.5 MB
Power Failure Protection for Solid State Drives
Illustrates several power management improvements for SSD that improve reliablity while lowering system costs.		I02271.06/7/2012PDF864.3 KB
Power Manager II and ispClock Application Examples
I01912.08/1/2007PDF456.1 KB
Power Manager II Product Brief
I01787.08/14/2013PDF1.7 MB
Power Manager II Product Brief (Chinese)
I0178C6.011/13/2012PDF2.1 MB
ProcessorPM - POWR605 Product Brochure
I02011.04/24/2009PDF1.6 MB
ProcessorPM Development Kit Product Brief
I02021.05/22/2013PDF673.4 KB
标题编号版本日期格式文件大小
选择全部
32 QFNS Pb-Free Device Material Content
Includes all 3 versions		D4/19/2016PDF43.4 KB
SN_SG32
Rev I5/1/2024PDF145.6 KB
SN24_PAC
Rev F2/7/2018PDF22.1 KB
TN_VN100_4k_M4A_PAC
Rev B110/13/2021PDF124.1 KB
TN_VN48 (PAC, M4A)
Rev B2/7/2018PDF25.3 KB
标题编号版本日期格式文件大小
选择全部
PAC-Designer Tutorial: Designing Power Manager II
This tutorial shows you how to use several processes, tools, and reports of the PAC-Designer software suite to program digital and analog elements of the ispPAC®-POWR1220AT8 device.		PDT0101.18/15/2008PDF1.3 MB
标题编号版本日期格式文件大小
选择全部
Complex Power Management: An Imperative for Modern System Design
11/1/2005PDF220.6 KB
Dynamic Power Management in an Embedded System
4/1/2005PDF619.6 KB
Load Switching Helps Implement Hot Swaping
1.03/1/2010PDF215.9 KB
Managing Power Sequencing for the LatticeSC FPGA
2/1/2007PDF312.9 KB
Power Management for Computer Peripherals - White Paper (Chinese Language Version)
1.05/31/2012PDF262.8 KB
Reset Generation for TI DSP Processor
1.03/1/2010PDF64.9 KB
Reset Generation for TI DSP Processor (Chinese Language)
1.06/28/2010PDF226.5 KB
Reset Generation for TI DSP Processor (Japanese Language)
1.03/1/2010PDF156.6 KB
Reset Generation for TI DSP Processor (Korean Language)
5/22/2013PDF321.1 KB
Reset Generation for TI DSP Processor (Traditional Chinese Language)
1.06/28/2010PDF286 KB
Transforming Circuit Board Design
1.09/26/2011PDF424.3 KB
Transforming Circuit Board Design (Chinese Language)
1.09/26/2011PDF449.1 KB
分布式PLD解决方案可降低服务器成本并提升灵活性
WP0091.08/1/2017PDF708.1 KB
标题编号版本日期格式文件大小
选择全部
[BSDL] ispPAC-POWR1014 48-pin TQFP
1.004/11/2006BSM8.2 KB
[BSDL] ispPAC-POWR1014A 48-pin TQFP
1.004/1/2006BSM7.8 KB
[BSDL] ispPAC-POWR1220AT8 100-pin TQFP
1.025/24/2006BSM12.9 KB
[BSDL] ispPAC-POWR605 24-pin QFNS
1.04/27/2009BSM8.1 KB
[BSDL] ispPAC-POWR607 24-pin QFN
1.08/1/2014BSM7.4 KB
[BSDL] ispPAC-POWR607 32-pin QFN
1.02/1/2007BSM7.5 KB
[BSDL] ispPAC-POWR6AT6 32-pin QFN
1.02/1/2007BSM7.9 KB
标题编号版本日期格式文件大小
选择全部
[IBIS] ispPAC-POWR1014/1014A
0.12/1/2007IBS276.6 KB
[IBIS] ispPAC-POWR1220AT8
0.23/2/2012IBS412.3 KB
[IBIS] ispPAC-POWR605
0.17/1/2009IBS174.8 KB
[IBIS] ispPAC-POWR607
0.12/1/2007IBS224.6 KB
[IBIS] ispPAC-POWR6AT6
0.12/1/2007IBS145.2 KB
标题编号版本日期格式文件大小
选择全部
POWR1014A Breakout Board Demo Source
This demo includes the PAC-Designer project source for the preprogrammed demonstration design. It programs the POWR1014A with power supply enable sequence logic and a counter circuit using the embedded timer & open-drain digital pins configured for LED 		1.03/21/2011ZIP7.4 KB
标题编号版本日期格式文件大小
选择全部
Selecting Power and Platform Manager Devices Excel Spreadsheet Tool
1.13/19/2012ZIP63.1 KB

支持

技术支持

有问题？我们来帮助您

授权

发现您需要的软件和IP授权

质量和可靠性

参考资料帮助解答您的问题

服务

外部资源帮助您完成工作