Platform Manager

集中控制功能并带有可扩展的电源管理

相关产品


MachXO3

革命性的电源管理架构——使用分布式电源检测和集中控制，可方便地管理多达36个电压。还带有故障记录功能，大大缩短了调试以及产品上市时间。

改变您的算法，而不是您的电路板——无需重新进行PCB设计，只需对Platform Manager器件重新编程，即可快速处理设计变更。

扫除限制——使用Platform Manager精确的电压调节和VID特性，可以方便地控制复杂、大功耗的ASIC和SoC。

特性

  • 集中的上电/断电时序控制以及电压传感
  • 使用电压调节/VID降低芯片功耗
  • 带有闭环微调的精确电压控制（准确度<10 mV）
  • 在100 µs内以0.2%（典型值）的准确度捕捉电压故障（主要原因）并将信息储存在片上闪存
  • 即使系统工作时也能快速修改监控阈值、定序或时序

立即跳转到

产品系列表

Platform Manager 器件选型指南

参数 LPTM10-1247 LPTM10-12107
模拟输入－单端 5 0
模拟输入－差分 7 12
模拟输入总数 12 12
专用漏极开路输出 12 12
专用数字输入 4 4
数字I/O 31 91
数字I/O总数 47 107
裕度和微调 6 8
MOSFET驱动器输出 4 4
CPLD宏单元 48 48
FPGA - LUT 640 640
封装 128-pin TQFP 208-ball ftBGA

解决方案实例

通过动态控制每个器件的功耗，降低功耗和系统的运行成本。

  • 通过VID实现动态功耗控制，降低超过30%的ASIC和处理器功耗。
  • 使用一段简单的代码控制电压，在提高电路板的性能和增加功能的同时，不增加功耗。
  • 无需使用微控制器和软件来配置DC-DC转换器。

通过可靠的故障记录，提高电路板的可靠性，减少调试时间。

  • 即使在使用很多个电源的复杂系统中，带有时间标记的非易失性存储器可以让您快速查明故障的主要原因。
  • 所有故障一旦发生，立即记录，并捕获所有电源的状态。并且直接将镜像存储到闪存中。
  • 捕获电路板故障的首要原因——可以很容易找到电源故障引起的闪存出错。

通过在系统可编程电源管理，减少现场维护成本。

  • 使用在系统可编程，在系统运行时改变时序算法并保证系统的可靠运行。
  • 备份初始镜像，确保电源管理算法的安全更新。
  • 无需派出技术人员进行现场升级。

在突然掉电情况下进行精确调整，在16µs内快速切换到备用电源

  • 突然掉电时，依靠小型电池维持供电。
  • 通过快速、精确的电压监控，在发生掉电时，自动切换到备用电源。

使用成本极低的MOSFET实现可靠的热插拔以降低系统成本。

  • 无需使用昂贵的大型MOSFET来实现可靠、大功率的热插拔控制器。
  • 减少需要的MOSFET总数——使用更小、成本更低、常见的MOSFET。

一个可重复使用的单芯片、可扩展的电源管理解决方案，节省了开发时间和精力。

  • 根据系统的大小和电源需求，使用一块芯片可管理12至36个电源，从而实现了可扩展性。
  • 通过省去分块的时序算法，简化电源管理设计过程。
  • 微调电源时序实现可靠的电路板上电。

设计资源

IP和参考设计

使用经过预先测试、可重复使用的功能简化您的设计工作

应用说明

了解如何最高效地使用我们一系列的FPGA和开发板

软件

覆盖整个设计流程，非常易于使用

开发套件和开发板

我们的开发板和开发套件能够简化您的设计流程

编程硬件

使用我们的编程硬件，轻松完成在系统编程和在线重配置

文档

快速参考
技术资源
资讯资源
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标题编号版本日期格式文件大小
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Controlling and Monitoring Power-One Bricks and SIPs with Lattice Power Manager Devices
AN605601.14/17/2008PDF216.1 KB
Creating Platform Manager Designs with PAC-Designer and Lattice Diamond Software
TN125901.03/4/2013PDF4.9 MB
Extending the VMON Input Range of Power/Platform Management Devices
FPGA-AN-020312.59/21/2021PDF1.1 MB
Fail-Safe Sequencing During Field Upgrades Source Files
DT60881.26/6/2012ZIP591.5 KB
Fail-Safe Sequencing During Field Upgrades with Platform Manager
AN608801.26/6/2012PDF1.1 MB
High-side Current Sensing Techniques for Power Manager Devices
AN604901.14/17/2008PDF70.9 KB
Implementing Power Supply Sequencers with Power/Platform Management Devices and PAC-Designer LogiBuilder
AN604201.210/7/2011PDF277 KB
Interfacing the Trim Output of Power Manager II Devices to DC-DC Converters
AN60741.24/7/2015PDF3.1 MB
ispPAC-POWR1220AT8 I2C Hardware Verification Utility
AN606701.011/21/2005PDF563.7 KB
Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.		FPGA-SC-020059.16/26/2026ZIP3.3 MB
Monitoring and Controlling Negative Power Supplies with Power Manager Devices
AN605102.14/17/2008PDF67.9 KB
Optimizing the Accuracy of ispPAC Power Manager Timers
AN607601.012/12/2007PDF215.9 KB
Platform Manager Data Sheet
FPGA-DS-020771.42/14/2020PDF7.5 MB
Powering Up and Programming the ispPAC-POWR1014/A
AN607501.14/11/2011PDF190.4 KB
Powering Up and Programming the ispPAC-POWR1220AT8
AN607301.14/21/2011PDF171.2 KB
Powering Up and Programming the ispPAC-POWR607
AN607801.14/21/2011PDF1.3 MB
Powering Up and Programming the ProcessorPM ispPAC-POWR605
AN608201.14/21/2011PDF1.1 MB
Programmable Comparator Options for ispPAC-POWR1220AT8
AN606901.011/21/2005PDF259.4 KB
Programming the ispPAC-POWR1220AT8 in a JTAG Chain Using the ATDI Pin
AN606801.12/28/2011PDF245.8 KB
Scalable Centralized Power Management Source Files
DT60891.26/6/2012ZIP520.7 KB
Scalable Centralized Power Management with Field Upgrade Support
AN608901.26/6/2012PDF1.1 MB
Stable Operation of DC-DC Converters with Power Manager Closed Loop Trim
AN60771.110/8/2014PDF676.8 KB
Using PAC-Designer's Power Manager Waveform Editor
AN605401.011/23/2005PDF276.3 KB
Using Power MOSFETs with Power/Platform Management Devices
AN60481.38/29/2017PDF734.6 KB
Using the HVOUT Simulator Utility to Estimate FET Ramp Times
AN607001.011/21/2005PDF540.1 KB
Using the Platform Manager Successfully
TN122301.18/17/2012PDF949.4 KB
标题编号版本日期格式文件大小
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Platform Manager Data Sheet
FPGA-DS-020771.42/14/2020PDF7.5 MB
标题编号版本日期格式文件大小
选择全部
Controlling and Monitoring Power-One Bricks and SIPs with Lattice Power Manager Devices
AN605601.14/17/2008PDF216.1 KB
Creating Platform Manager Designs with PAC-Designer and Lattice Diamond Software
TN125901.03/4/2013PDF4.9 MB
Extending the VMON Input Range of Power/Platform Management Devices
FPGA-AN-020312.59/21/2021PDF1.1 MB
Fail-Safe Sequencing During Field Upgrades Source Files
DT60881.26/6/2012ZIP591.5 KB
Fail-Safe Sequencing During Field Upgrades with Platform Manager
AN608801.26/6/2012PDF1.1 MB
High-side Current Sensing Techniques for Power Manager Devices
AN604901.14/17/2008PDF70.9 KB
Implementing Power Supply Sequencers with Power/Platform Management Devices and PAC-Designer LogiBuilder
AN604201.210/7/2011PDF277 KB
Interfacing the Trim Output of Power Manager II Devices to DC-DC Converters
AN60741.24/7/2015PDF3.1 MB
ispPAC-POWR1220AT8 I2C Hardware Verification Utility
AN606701.011/21/2005PDF563.7 KB
Monitoring and Controlling Negative Power Supplies with Power Manager Devices
AN605102.14/17/2008PDF67.9 KB
Optimizing the Accuracy of ispPAC Power Manager Timers
AN607601.012/12/2007PDF215.9 KB
Powering Up and Programming the ispPAC-POWR1014/A
AN607501.14/11/2011PDF190.4 KB
Powering Up and Programming the ispPAC-POWR1220AT8
AN607301.14/21/2011PDF171.2 KB
Powering Up and Programming the ispPAC-POWR607
AN607801.14/21/2011PDF1.3 MB
Powering Up and Programming the ProcessorPM ispPAC-POWR605
AN608201.14/21/2011PDF1.1 MB
Programmable Comparator Options for ispPAC-POWR1220AT8
AN606901.011/21/2005PDF259.4 KB
Programming the ispPAC-POWR1220AT8 in a JTAG Chain Using the ATDI Pin
AN606801.12/28/2011PDF245.8 KB
Scalable Centralized Power Management Source Files
DT60891.26/6/2012ZIP520.7 KB
Scalable Centralized Power Management with Field Upgrade Support
AN608901.26/6/2012PDF1.1 MB
Stable Operation of DC-DC Converters with Power Manager Closed Loop Trim
AN60771.110/8/2014PDF676.8 KB
Using PAC-Designer's Power Manager Waveform Editor
AN605401.011/23/2005PDF276.3 KB
Using Power MOSFETs with Power/Platform Management Devices
AN60481.38/29/2017PDF734.6 KB
Using the HVOUT Simulator Utility to Estimate FET Ramp Times
AN607001.011/21/2005PDF540.1 KB
Using the Platform Manager Successfully
TN122301.18/17/2012PDF949.4 KB
标题编号版本日期格式文件大小
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Platform Management Utility Functions IP Core User's Guide
IPUG9401.11/24/2011PDF551.8 KB
Platform Manager Development Kit Quick Start Guide
QS00913/27/2013PDF554.5 KB
Platform Manager Development Kit User's Guide
EB5801.212/7/2010PDF1.6 MB
Power Manager II Hercules Development Kit User's Guide
EB5701.012/22/2010PDF3 MB
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BSCAN1 - Multiple Boundary Scan Port Addressable Buffer - Documentation
FPGA-RD-021057.41/29/2021PDF993.7 KB
BSCAN1 - Multiple Boundary Scan Port Addressable Buffer - Source Code
RD10017.34/18/2011ZIP152.4 KB
BSCAN2 - Multiple Boundary Scan Port Linker - Source Code
RD10024.63/13/2014ZIP2.6 MB
BSCAN2 - Multiple Scan Port Linker - Documentation
FPGA-RD-021064.91/29/2021PDF918.1 KB
Closed Loop Power Supply Trimming Documentation
RD10781.012/6/2010PDF278.2 KB
Closed Loop Power Supply Trimming Source Code
RD10781.012/6/2010ZIP269.4 KB
Error Logging Using Platform Manager Documentation
RD10771.09/28/2010PDF422.5 KB
Error Logging Using Platform Manager Source Files
RD10771.09/28/2010ZIP372.9 KB
GPIO Expander, Documentation
RD10651.34/12/2011PDF280.6 KB
GPIO Expander, Source Code
RD10651.34/12/2011ZIP195.5 KB
I2C (Inter-Integrated Circuit) Master Controller - Documentation
RD10055.83/6/2014PDF987.4 KB
I2C (Inter-Integrated Circuit) Master Controller - Source Code
RD10055.91/10/2015ZIP809.7 KB
Long Delay Timers Using Platform Manager Documentation
RD10791.19/28/2010PDF874.1 KB
Long Delay Timers Using Platform Manager Source Files
RD10791.09/28/2010ZIP683.9 KB
OrCAD Capture (.dsn) format schematics
19/28/2010ZIP0.7 KB
Platform Manager Dev Kit Initial Demo Source Files
RD1.11/26/2011ZIP1.1 MB
Platform Manager Dev Kit Power Supply Voltage Control (VID) Demo Source Files
1.012/6/2010ZIP1.1 MB
Power Management Bus Reference Design - Source Code
RD11001.112/23/2011ZIP378.3 KB
Power Management Bus Reference Design Documentation
FPGA-RD-020971.21/22/2021PDF1.1 MB
PWM Fan Controller
RD10601.69/10/2014PDF481.5 KB
PWM Fan Controller - Source Code
RD10601.71/16/2015ZIP2.9 MB
Temperature Monitor Using Platform Manager Documentation
RD10801.09/28/2010PDF330 KB
Temperature Monitor Using Platform Manager Source Files
RD10801.09/28/2010ZIP256.7 KB
UART (Universal Asynchronous Receiver/Transmitter) - Source Code
7/15/2025ZIP772.5 KB
UART (Universal Asynchronous Receiver/Transmitter) - User Guide
FPGA-RD-022701.87/15/2025PDF741.9 KB
标题编号版本日期格式文件大小
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MachXO 300 mm Fab Transition Circuit Observations Mitigation
PB13772.06/12/2017PDF82.7 KB
标题编号版本日期格式文件大小
选择全部
ACN03D-11 Withdrawal of ACN03C-11
Material Set		ANC03D-1114/1/2011PDF796.6 KB
PCN 03A-15 Alternate Qualified Foundry / Mask Set and Alternate Qualified Material Sets for Platform Manager Products
Foundry, Mask Set, Material Set		PCN03A-152.011/23/2015PDF318.2 KB
PCN 03A-15 LPTM10 New MASK SET Yield and Parametric Analysis
PCN03A-151.011/23/2015PDF779.6 KB
标题编号版本日期格式文件大小
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Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.		FPGA-SC-020059.16/26/2026ZIP3.3 MB
标题编号版本日期格式文件大小
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Platform Manager Product Brochure
I02081.04/10/2012PDF2.8 MB
Platform Manager Product Brochure (Chinese)
I0208C1.06/4/2012PDF2.9 MB
标题编号版本日期格式文件大小
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FTG208_LPTM10
Rev G16/9/2022PDF141.7 KB
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Fast and Efficient Board and Power Management Solutions (Chinese Language)
1.04/1/2011PDF502.3 KB
Reset Generation for TI DSP Processor
1.03/1/2010PDF64.9 KB
Reset Generation for TI DSP Processor (Chinese Language)
1.06/28/2010PDF226.5 KB
Reset Generation for TI DSP Processor (Japanese Language)
1.03/1/2010PDF156.6 KB
Reset Generation for TI DSP Processor (Traditional Chinese Language)
1.06/28/2010PDF286 KB
Saving Power Using Closed Loop Voltage Scaling Control - White Paper (Chinese Language Version)
1.05/31/2012PDF405.9 KB
Transforming Board Management (Chinese Language)
1.010/1/2010PDF394.8 KB
Transforming Circuit Board Design
1.09/26/2011PDF424.3 KB
Transforming Circuit Board Design (Chinese Language)
1.09/26/2011PDF449.1 KB
标题编号版本日期格式文件大小
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LPTM10_12107_XO640
1.0110/8/2014BSM30.3 KB
LPTM10_1247_MO640
1.0110/8/2014BSM24.9 KB
Platform Manager 128 TQFP BSDL Files
1.12/26/2013ZIP8.4 KB
Platform Manager 208 ftBGA BSDL Files
1.12/27/2014ZIP10 KB
标题编号版本日期格式文件大小
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[IBIS] ispPAC-POWR1220AT8
0.23/2/2012IBS412.3 KB
标题编号版本日期格式文件大小
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Selecting Power and Platform Manager Devices Excel Spreadsheet Tool
1.13/19/2012ZIP63.1 KB

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